用于量子比特控制的低温CMOS RF awg

IF 3.2
Sudipto Chakraborty;Marcel Kossel;Matthias Brändli;Pier-Andrea Francese;Mridula Prathapan;Pat Rosno;Mark Yeck;John F. Bulzacchelli;Daniil Frolov;David J. Frank;Ray Richetta;Timothy J. Schmerbeck;Daniel Ramirez;Christian W. Baks;Ken Inoue;Cezar Zota;Austin Carter;Bryce Snell;Devin Underwood;Kevin Tien;Bodhisatwa Sadhu;Daniel J. Friedman
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引用次数: 0

摘要

本文介绍了使用FinFET CMOS技术在低温下工作的两种射频(RF)任意波形发生器(awg)的设计方法。本文介绍了使用不同类型的量子比特(自旋和传输)的高规模量子计算系统的功率、性能和面积权衡。第一种考虑的设计使用直接数字合成(DDS)方法为自旋量子位提供宽带宽(1-18 GHz)控制解决方案。由于该设计点是在两个技术节点(14纳米和7纳米CMOS)中实现的,因此它为该应用程序从技术扩展中获得的好处提供了一个窗口。此外,DDS架构提供了灵活性,以满足自旋量子比特快速发展的需求,并且自然支持控制波形的幅度,相位,持续时间,频率和间距的高度可编程性。基于dds的宽带RF数模转换器(DAC)在整个1 - 18 ghz目标工作范围内运行,为最先进的自旋量子比特平台提供足够的控制信号带宽。第二种设计方法使用各种技术,利用电流模式模拟设计为传输量子比特产生高度可重构的低功耗控制波形。第二种方法使用两个14nm FinFET CMOS设计实现,使得设计驱动的功率缩放技术得以研究。基于dds的单自旋量子比特控制器功耗为40-140 mW,在14nm FinFET节点实现中占用0.5 mm2,在7nm FinFET节点中占用30-68 mW,占用0.1 mm2。在14nm FinFET中实现的电流模式transmon量子比特控制器设计分别消耗23和12.8 mW,每个量子比特控制器分别占用1.61和1.32 mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cryogenic CMOS RF AWGs for Qubit Control
This article presents design approaches for two radio frequency (RF) arbitrary waveform generators (AWGs) operating at cryogenic temperatures using FinFET CMOS technologies. This article presents power, performance, and area tradeoffs for highly scaled quantum computing systems using different types of qubits (spin and transmons). The first considered design uses a direct digital synthesis (DDS) approach to provide a wide bandwidth (1-18 GHz) control solution for spin qubits. As this design point was implemented in two technology nodes (14- and 7-nm CMOS), it offers a window into the benefits for this application arising from technology scaling. Furthermore, the DDS architecture offers flexibility to meet the requirements of the rapidly evolving requirements of spin qubits and naturally supports a high degree of programmability of the amplitude, phase, duration, frequency, and spacing of control waveforms. The DDS-based wideband RF digital-to-analog converter (DAC) was demonstrated to be operational over the full 1–18-GHz target operating range, providing sufficient bandwidth for control signals for state-of-the-art spin-qubit platforms. The second design approach uses various techniques for highly reconfigurable, low-power control waveform generation for transmon qubits using current-mode analog design. This second approach, implemented using two 14-nm FinFET CMOS designs, has enabled the investigation of design-driven power scaling techniques. The DDS-based single spin-qubit controller consumes 40-140 mW, occupying 0.5 mm2 in a 14-nm FinFET node implementation, and 30-68 mW, occupying 0.1 mm2 in a 7-nm FinFET node. The current-mode transmon qubit controller designs, both implemented in 14-nm FinFET, consume 23 and 12.8 mW, respectively, occupying 1.61 and 1.32 mm2 per qubit controller, respectively.
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