TID effect study and hardened method of cascode GaN HEMT

Conventional cascode GaN HEMTs, which combine a trench gate Si MOSFET with a D-HEMT, are vulnerable to total ionizing dose (TID) radiation, exhibiting severe threshold voltage (V_GS(th)) degradation and functional failure at relatively low dose levels (≤30 krad(Si)). In this paper, a TID-hardened cascode GaN HEMT is proposed by integrating a radiation-hardened Si MOSFET with a commercial D-HEMT. By replacing the non-radiation-hardened trench gate MOSFET with a radiation-hardened planar Si MOSFET, the TID tolerance is improved to over 200 krad(Si), with the V_GS(th) drift controlled within 0.4 V after irradiation and annealing. The oxides in both the cell region and junction termination region of the planar Si MOSFET are specially radiation-hardened by optimizing the device process and structure. Concerning the phenomenon of on resistance (R_DS(on)) increase after irradiation and annealing, the degradation mechanism is investigated through TCAD simulations and analytical models. The reason lies in that during irradiation forming interface states at the AlGaN/GaN interface. The annealing process accelerates the growth of interface states at the Si₃N₄/AlGaN interface. The generation of interface states at these two positions reduces the 2DEG density and mobility in the 2DEG channel, leading to an increase in R_DS(on). Through this study, the relatively mature low-voltage radiation-hardened technology can be applied in the high-voltage field.