Layered GaPS4 dielectric for two-dimensional transistors

Developing van der Waals (vdW) high-k dielectric layers is a key factor in achieving high-performance two-dimensional (2D) semiconductor field effect transistors (FETs). Here, we experimentally reveal that layered GaPS₄ flakes exhibit a high dielectric constant of up to 35 and a high capacitance density (∼2.95 μF/cm²), along with a bandgap larger than 4.15 eV. Band alignment of MoS₂/GaPS₄ heterostructure indicates a unipolar-like barrier between MoS₂ and GaPS₄ for electrons of ∼1.92 eV. We employed GaPS₄ as gate dielectric with an equivalent oxide thickness (EOT) of 1 nm in a MoS₂ FET, and the device shows a low gate leakage current of 10⁻¹³ A, a high on/off ratio of ∼3 × 10⁸, and minimal hysteresis (∼20 mV). Theoretical modeling confirms that weak interactions preserve the MoS₂ channel’s inherent electronic properties. Compared to other layered dielectrics, GaPS₄ in MoS₂ FETs demonstrates superior properties in terms of bandgap, dielectric constant, EOT and on/off ratio. These advantages highlight the potential of GaPS₄ for integration into 2D semiconductor FETs.