{"title":"侧壁栅GaN垂直晶体管准饱和现象的观察","authors":"Chih-Kang Chang, , , Zhi-Xiang Zhang, , , Ting-Ci Li, , , Jun-Xiang Wang, , , Yu-Chuan Chu, , , Ting-I Wang, , , Miin-Jang Chen, , , Tien-Yu Wang, , , Wei-Chih Lai, , and , Jian-Jang Huang*, ","doi":"10.1021/acsaelm.5c01412","DOIUrl":null,"url":null,"abstract":"<p >We report the observation of quasi-saturation behavior in GaN vertical metal oxide semiconductor field-effect transistors featuring a sidewall-gate architecture. Compared to conventional trench-gate designs, the sidewall-gate structure exhibits pronounced drain current roll-off and negative transconductance under high gate bias. This degradation is consistent with space charge modulation, wherein localized electron accumulation at the gate-drift interface distorts the electric field distribution and limits carrier mobility. Comprehensive electrical characterization and technology computer-aided design simulations reveal how asymmetric gate geometry affects vertical and lateral electron spreading paths. These findings highlight the role for mitigating field-induced current degradation in vertical GaN power devices.</p>","PeriodicalId":3,"journal":{"name":"ACS Applied Electronic Materials","volume":"7 19","pages":"9030–9036"},"PeriodicalIF":4.7000,"publicationDate":"2025-09-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://pubs.acs.org/doi/pdf/10.1021/acsaelm.5c01412","citationCount":"0","resultStr":"{\"title\":\"Observation of Quasi-Saturation Phenomenon in Sidewall Gate GaN Vertical Transistors\",\"authors\":\"Chih-Kang Chang, , , Zhi-Xiang Zhang, , , Ting-Ci Li, , , Jun-Xiang Wang, , , Yu-Chuan Chu, , , Ting-I Wang, , , Miin-Jang Chen, , , Tien-Yu Wang, , , Wei-Chih Lai, , and , Jian-Jang Huang*, \",\"doi\":\"10.1021/acsaelm.5c01412\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p >We report the observation of quasi-saturation behavior in GaN vertical metal oxide semiconductor field-effect transistors featuring a sidewall-gate architecture. Compared to conventional trench-gate designs, the sidewall-gate structure exhibits pronounced drain current roll-off and negative transconductance under high gate bias. This degradation is consistent with space charge modulation, wherein localized electron accumulation at the gate-drift interface distorts the electric field distribution and limits carrier mobility. Comprehensive electrical characterization and technology computer-aided design simulations reveal how asymmetric gate geometry affects vertical and lateral electron spreading paths. These findings highlight the role for mitigating field-induced current degradation in vertical GaN power devices.</p>\",\"PeriodicalId\":3,\"journal\":{\"name\":\"ACS Applied Electronic Materials\",\"volume\":\"7 19\",\"pages\":\"9030–9036\"},\"PeriodicalIF\":4.7000,\"publicationDate\":\"2025-09-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://pubs.acs.org/doi/pdf/10.1021/acsaelm.5c01412\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ACS Applied Electronic Materials\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://pubs.acs.org/doi/10.1021/acsaelm.5c01412\",\"RegionNum\":3,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ACS Applied Electronic Materials","FirstCategoryId":"88","ListUrlMain":"https://pubs.acs.org/doi/10.1021/acsaelm.5c01412","RegionNum":3,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Observation of Quasi-Saturation Phenomenon in Sidewall Gate GaN Vertical Transistors
We report the observation of quasi-saturation behavior in GaN vertical metal oxide semiconductor field-effect transistors featuring a sidewall-gate architecture. Compared to conventional trench-gate designs, the sidewall-gate structure exhibits pronounced drain current roll-off and negative transconductance under high gate bias. This degradation is consistent with space charge modulation, wherein localized electron accumulation at the gate-drift interface distorts the electric field distribution and limits carrier mobility. Comprehensive electrical characterization and technology computer-aided design simulations reveal how asymmetric gate geometry affects vertical and lateral electron spreading paths. These findings highlight the role for mitigating field-induced current degradation in vertical GaN power devices.
期刊介绍:
ACS Applied Electronic Materials is an interdisciplinary journal publishing original research covering all aspects of electronic materials. The journal is devoted to reports of new and original experimental and theoretical research of an applied nature that integrate knowledge in the areas of materials science, engineering, optics, physics, and chemistry into important applications of electronic materials. Sample research topics that span the journal's scope are inorganic, organic, ionic and polymeric materials with properties that include conducting, semiconducting, superconducting, insulating, dielectric, magnetic, optoelectronic, piezoelectric, ferroelectric and thermoelectric.
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