A new fault-tolerance majority voter circuit for quantum-based nano-scale digital systems

Quantum-dot cellular automata (QCA) technology has gained attention lately due to its ability to reduce energy dissipation and minimize circuit area. However, the existing research shows that a critical challenge arises from the lack of circuit resistance in QCA systems when confronted with defects. This issue directly impacts circuit stability and output generation. Moreover, the 3-input majority gate (MV3) is a foundational component within QCA circuits, making its improvement crucial for developing fault-tolerant circuits. One approach is to design MV3 that incorporates essential quantum cells within a single clock cycle. Thus, this paper presents a unique cellular structure for the MV3 gate, utilizing simple quantum cells. The proposed gate, comprising only twelve cells, serves as a building block for QCA circuits. It boasts several key features, including low power consumption, efficient output polarity (± 9.93e00−1), and high reliability. Furthermore, to show the efficiency of the suggested gate, it is employed in realizing a 2:1 multiplexer and a full adder/subtractor. Lastly, the proposed MV3 gate is utilized to develop a simultaneous multi-logic gate  which is producing several vital digital circuits, such as AND, OR, NOT, NAND, Copy, Subtractor, and Adder. The circuits are designed using QCADesigner and QCAPro, with power estimation included in the process. The comparative analysis reveals that the proposed structures significantly enhance the trade-off between complexity, fault tolerance, and power consumption compared to previous designs.