Gisela De La Fuente-Cortes, Rosalba Perdomo-Cosme, Maria M. Perez-Torres, Victor R. Gonzalez-Diaz
{"title":"具有可消除抖动的mash1.1调制器的理论和硬件级精度","authors":"Gisela De La Fuente-Cortes, Rosalba Perdomo-Cosme, Maria M. Perez-Torres, Victor R. Gonzalez-Diaz","doi":"10.1007/s10470-025-02445-6","DOIUrl":null,"url":null,"abstract":"<div><p>This manuscript explores Digital Delta-Sigma Modulators, commenting on the limitations of the eliminable dither in a Multi-stAge-noise-SHaping solution. The mathematical analysis in this work provides evidence, through a quantitative study, of the periodicity for eliminable dither and the Song and Park Multi-stAge-noise-SHaping modulators. The work presents the necessary considerations for the unexplored physical and digital synthesis implementation, commenting on the hardware limitations of the eliminable dither solution. The manuscript proposes a new dithering scheme with a feasible digital synthesis in a standard cell CMOS integrated circuit design. The solution uses an XOR-based signal feedback, extending the modulator’s periodicity with fourteen percent of additional hardware, representing a low-cost solution compared with similar systems.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"124 2","pages":""},"PeriodicalIF":1.4000,"publicationDate":"2025-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://link.springer.com/content/pdf/10.1007/s10470-025-02445-6.pdf","citationCount":"0","resultStr":"{\"title\":\"Theoretical and hardware-level precising in MASH 1-1-1 modulators with eliminable dither\",\"authors\":\"Gisela De La Fuente-Cortes, Rosalba Perdomo-Cosme, Maria M. Perez-Torres, Victor R. Gonzalez-Diaz\",\"doi\":\"10.1007/s10470-025-02445-6\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This manuscript explores Digital Delta-Sigma Modulators, commenting on the limitations of the eliminable dither in a Multi-stAge-noise-SHaping solution. The mathematical analysis in this work provides evidence, through a quantitative study, of the periodicity for eliminable dither and the Song and Park Multi-stAge-noise-SHaping modulators. The work presents the necessary considerations for the unexplored physical and digital synthesis implementation, commenting on the hardware limitations of the eliminable dither solution. The manuscript proposes a new dithering scheme with a feasible digital synthesis in a standard cell CMOS integrated circuit design. The solution uses an XOR-based signal feedback, extending the modulator’s periodicity with fourteen percent of additional hardware, representing a low-cost solution compared with similar systems.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":\"124 2\",\"pages\":\"\"},\"PeriodicalIF\":1.4000,\"publicationDate\":\"2025-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://link.springer.com/content/pdf/10.1007/s10470-025-02445-6.pdf\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-025-02445-6\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02445-6","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Theoretical and hardware-level precising in MASH 1-1-1 modulators with eliminable dither
This manuscript explores Digital Delta-Sigma Modulators, commenting on the limitations of the eliminable dither in a Multi-stAge-noise-SHaping solution. The mathematical analysis in this work provides evidence, through a quantitative study, of the periodicity for eliminable dither and the Song and Park Multi-stAge-noise-SHaping modulators. The work presents the necessary considerations for the unexplored physical and digital synthesis implementation, commenting on the hardware limitations of the eliminable dither solution. The manuscript proposes a new dithering scheme with a feasible digital synthesis in a standard cell CMOS integrated circuit design. The solution uses an XOR-based signal feedback, extending the modulator’s periodicity with fourteen percent of additional hardware, representing a low-cost solution compared with similar systems.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.