Implementation and analysis of axon hillock neuron circuits using 28 nm FD-SOI MOSFET: original design and modifications

Neuromorphic engineering has garnered significant interest for its potential in creating energy-efficient and highly parallel computing systems. One of the key components of such systems is the neuron circuit, especially Axon Hillock, which plays a vital role in signal integration and propagation. This paper explores the design of Axon Hillock (A-H) neuron circuits using a 28 nm Fully Depleted Silicon on Insulator (FD-SOI) MOSFET due to its advantages over Bulk CMOS. The original A-H neuron circuit undergoes two distinct modifications. In the first modification, original differential amplifier’s functionality is replaced with the inherent inverter threshold voltage, resulting in a reduced transistor count, lower power consumption of 26.3 µW, and an improved frequency of 9.18 kHz. The second modification involves replacing the differential amplifier with a low-threshold 2-transistor (2-T) based differential circuit, achieving a nearly 50% reduction in power consumption (16.8 µW) and a 1 kHz frequency boost (9.78 kHz) compared to the original A-H neuron circuit. Further, the third modified circuit eliminates the differential amplifier, membrane capacitance (C_mem), and other control transistors, transforming it into a low-power variant. This circuit has a power consumption of 6.9 pW and an increased frequency of 63.34 kHz, nearly 18-fold increase compared to the original A-H neuron circuit.