A low distortion analog switch for high linearity and performance applications based on negative-voltage bootstrapped capacitor and dummy switch techniques

This study introduces a novel bootstrapped sampling switch designed for high-resolution, low-distortion input analog-to-digital converters (ADCs). The proposed switch incorporates negative-voltage bootstrapped capacitor and dummy switch techniques. The primary advantages of the proposed circuit include significant reductions in charge injection effects and parasitic gate capacitance, achieved through the dummy switch and negative-voltage bootstrapped capacitor techniques, respectively. The proposed design reduces parasitic capacitance by over 30% compared to conventional structures. Simulated in 0.18 μm complementary metal-oxide-semiconductor (CMOS) technology, the switch delivers rail-to-rail input voltage performance. It achieves an effective number of bits (ENOB) of 17.4 bit, a signal-to-noise and distortion (SINAD) ratio of 106.5 dB, a signal-to-noise ratio (SNR) of 108.5 dB, a spurious-free dynamic range (SFDR) of 113.2 dB, and a total harmonic distortion (THD) of -110.8 dB at a supply voltage of 1.8 V and a sampling rate of 50 MHz. This makes the proposed switch highly suitable for low-voltage, high-accuracy, and high-speed applications.