Strain technology of two-dimensional semiconductors for industrial electronics

Two-dimensional (2D) semiconductors, especially transition metal dichalcogenides, are the most competitive channel materials for post-silicon electronics due to their great miniaturization potential and advantages of high performance and low power consumption. The atomically thick structural advantage of 2D semiconductors also makes their strain tolerance far greater than that of silicon, making them an ideal platform for implementing and expanding strain technology in post-silicon electronics. The strain technology of 2D semiconductors can not only improve the mobility and on-current of a single device but also be more conveniently applied to the integration of 3D gate-all-around and complementary field-effect transistors. In recent years, a series of strain technologies with different characteristics have been developed for 2D semiconductors and transistor devices, including lattice mismatch, thermal expansion coefficient mismatch, substrate-induced stress technology, and process-induced stress. At present, it is necessary to sort out the existing technical foundation and propose strain strategies for 2D semiconductors that better suit industrialization and future 3D integration to meet the needs of high-performance post-silicon electronics. This review takes the mature strained silicon technology as a benchmark, systematically reviews the current strain technology of 2D semiconductors and devices, deeply analyzes the limitations of existing technologies, and proposes the development direction of strain technology for 2D semiconductors suitable for industrial applications and future 3D integration.