A novel H-shaped FET for enhanced CFET performance at advanced technology node

In this work, a novel H-shaped pFET (pHFET) is proposed to address the n/p driven current mismatch in the complementary field effect transistor (CFET) architecture. It is realized through secondary fin patterning and selective lateral epitaxy, forming dual (110) dominant oriented fins to enlarge effective channel area (A_eff) and enhance hole mobility. The performance of H-shaped FETs (HFETs) for both nFET and pFET is evaluated through TCAD simulations. Detailed comparison with conventional NSFETs confirms the application potential of pHFETs. Following the principles of design-technology co-optimization (DTCO), key structural parameters, including H_fin and T_fin, are optimized to enhance device performance. Under the optimized dimensions, the proposed pHFET achieves a 24 % I_ON improvement and 6.2 % reduction in intrinsic delay over conventional NSFETs. Circuit-level implementations in RO, Inverter, and 6 T-SRAM confirm its superior performance, especially for high-speed applications. Additionally, the ladder-FETs, which formed by stacking HFET, are also presented and discussed to extend the scalability and practical applicability of HFETs.