Combining quasi-one-dimensional modeling with region-wise structure analysis for rapid technology computer-aided design simulations of gate-all-around MOSFETs.

The research and development process of semiconductor device technology heavily relies on technology computer-aided design simulations. However, long simulation times remain a significant challenge for research and development engineers. We propose a robust and efficient method to accelerate technology computer-aided design device simulations by generating approximate solutions faster. Since the majority of simulation time is spent preparing an approximate initial solution, our approach achieves orders-of-magnitude faster simulation than the conventional bias-ramping scheme, without incurring additional computational cost. Key techniques such as the quasi-one-dimensional model and the region-wise structure analysis are employed to handle general three-dimensional device structures. The applicability of this method is demonstrated through the simulation of next-generation complementary field-effect transistor inverters and other structures, yielding results 10 to 100 times faster than conventional methods.