{"title":"采用后校正技术改进环境适应性的通用PEH接口电路","authors":"Saman Shoorabi Sani","doi":"10.1049/cds2/9226422","DOIUrl":null,"url":null,"abstract":"<p>This study presents a novel triple-step bias-flip rectifier with a post implementation calibration (PIC) scheme to address both the need for a general-purpose adaptable piezoelectric energy harvester (PEH) interface circuit (PEHIC) and the PVT-related issues while maintaining acceptable efficiency and a smaller inductor. Due to the PIC, the proposed circuit is adaptable to various piezoelectric materials and inductors. Using a 100-µH inductor, a 180 nm standard design kit, and an energy investing (EI) scheme, the proposed rectifier achieves a bias flip efficiency of 100%. Without EI, the proposed circuit achieves the recently reported high bias flip efficiency, that is, <i>ɳ</i><sub>flip</sub>, in the literature with a considerably smaller inductor. According to simulation results, the improvement of the designed circuit relative to the full bridge rectifier (FBR) falls within the scope of 2–3.8. Postsimulation calculations revealed that the figure of merit of adaptivity, that is, FoM<sub>adaptivity</sub>, of the proposed circuit is approximately 83.</p>","PeriodicalId":50386,"journal":{"name":"Iet Circuits Devices & Systems","volume":"2025 1","pages":""},"PeriodicalIF":1.2000,"publicationDate":"2025-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/9226422","citationCount":"0","resultStr":"{\"title\":\"Generic PEH Interface Circuit With an Improved Environmental Adaptivity Using a Post Implementation Calibration Technique\",\"authors\":\"Saman Shoorabi Sani\",\"doi\":\"10.1049/cds2/9226422\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>This study presents a novel triple-step bias-flip rectifier with a post implementation calibration (PIC) scheme to address both the need for a general-purpose adaptable piezoelectric energy harvester (PEH) interface circuit (PEHIC) and the PVT-related issues while maintaining acceptable efficiency and a smaller inductor. Due to the PIC, the proposed circuit is adaptable to various piezoelectric materials and inductors. Using a 100-µH inductor, a 180 nm standard design kit, and an energy investing (EI) scheme, the proposed rectifier achieves a bias flip efficiency of 100%. Without EI, the proposed circuit achieves the recently reported high bias flip efficiency, that is, <i>ɳ</i><sub>flip</sub>, in the literature with a considerably smaller inductor. According to simulation results, the improvement of the designed circuit relative to the full bridge rectifier (FBR) falls within the scope of 2–3.8. Postsimulation calculations revealed that the figure of merit of adaptivity, that is, FoM<sub>adaptivity</sub>, of the proposed circuit is approximately 83.</p>\",\"PeriodicalId\":50386,\"journal\":{\"name\":\"Iet Circuits Devices & Systems\",\"volume\":\"2025 1\",\"pages\":\"\"},\"PeriodicalIF\":1.2000,\"publicationDate\":\"2025-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ietresearch.onlinelibrary.wiley.com/doi/epdf/10.1049/cds2/9226422\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Iet Circuits Devices & Systems\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/cds2/9226422\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Iet Circuits Devices & Systems","FirstCategoryId":"5","ListUrlMain":"https://ietresearch.onlinelibrary.wiley.com/doi/10.1049/cds2/9226422","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Generic PEH Interface Circuit With an Improved Environmental Adaptivity Using a Post Implementation Calibration Technique
This study presents a novel triple-step bias-flip rectifier with a post implementation calibration (PIC) scheme to address both the need for a general-purpose adaptable piezoelectric energy harvester (PEH) interface circuit (PEHIC) and the PVT-related issues while maintaining acceptable efficiency and a smaller inductor. Due to the PIC, the proposed circuit is adaptable to various piezoelectric materials and inductors. Using a 100-µH inductor, a 180 nm standard design kit, and an energy investing (EI) scheme, the proposed rectifier achieves a bias flip efficiency of 100%. Without EI, the proposed circuit achieves the recently reported high bias flip efficiency, that is, ɳflip, in the literature with a considerably smaller inductor. According to simulation results, the improvement of the designed circuit relative to the full bridge rectifier (FBR) falls within the scope of 2–3.8. Postsimulation calculations revealed that the figure of merit of adaptivity, that is, FoMadaptivity, of the proposed circuit is approximately 83.
期刊介绍:
IET Circuits, Devices & Systems covers the following topics:
Circuit theory and design, circuit analysis and simulation, computer aided design
Filters (analogue and switched capacitor)
Circuit implementations, cells and architectures for integration including VLSI
Testability, fault tolerant design, minimisation of circuits and CAD for VLSI
Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs
Device and process characterisation, device parameter extraction schemes
Mathematics of circuits and systems theory
Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers