采用后校正技术改进环境适应性的通用PEH接口电路

IF 1.2 4区 工程技术 Q4 ENGINEERING, ELECTRICAL & ELECTRONIC
Saman Shoorabi Sani
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引用次数: 0

摘要

本研究提出了一种新颖的三阶偏置翻转整流器,具有实施后校准(PIC)方案,以解决对通用自适应压电能量采集器(PEH)接口电路(PEHIC)的需求和ppt相关问题,同时保持可接受的效率和更小的电感。由于采用PIC电路,该电路适用于各种压电材料和电感。采用100µH电感、180 nm标准设计套件和能量投资(EI)方案,所提出的整流器实现了100%的偏置翻转效率。在没有EI的情况下,所提出的电路实现了最近报道的高偏置翻转效率,即在文献中使用相当小的电感器进行翻转。仿真结果表明,设计电路相对于全桥整流器(FBR)的改进幅度在2-3.8之间。仿真后计算表明,所提出电路的自适应优点,即自适应性能,约为83。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Generic PEH Interface Circuit With an Improved Environmental Adaptivity Using a Post Implementation Calibration Technique

Generic PEH Interface Circuit With an Improved Environmental Adaptivity Using a Post Implementation Calibration Technique

This study presents a novel triple-step bias-flip rectifier with a post implementation calibration (PIC) scheme to address both the need for a general-purpose adaptable piezoelectric energy harvester (PEH) interface circuit (PEHIC) and the PVT-related issues while maintaining acceptable efficiency and a smaller inductor. Due to the PIC, the proposed circuit is adaptable to various piezoelectric materials and inductors. Using a 100-µH inductor, a 180 nm standard design kit, and an energy investing (EI) scheme, the proposed rectifier achieves a bias flip efficiency of 100%. Without EI, the proposed circuit achieves the recently reported high bias flip efficiency, that is, ɳflip, in the literature with a considerably smaller inductor. According to simulation results, the improvement of the designed circuit relative to the full bridge rectifier (FBR) falls within the scope of 2–3.8. Postsimulation calculations revealed that the figure of merit of adaptivity, that is, FoMadaptivity, of the proposed circuit is approximately 83.

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来源期刊
Iet Circuits Devices & Systems
Iet Circuits Devices & Systems 工程技术-工程:电子与电气
CiteScore
3.80
自引率
7.70%
发文量
32
审稿时长
3 months
期刊介绍: IET Circuits, Devices & Systems covers the following topics: Circuit theory and design, circuit analysis and simulation, computer aided design Filters (analogue and switched capacitor) Circuit implementations, cells and architectures for integration including VLSI Testability, fault tolerant design, minimisation of circuits and CAD for VLSI Novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs Device and process characterisation, device parameter extraction schemes Mathematics of circuits and systems theory Test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers
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