{"title":"基于预测量化的心电信号压缩感知SAR ADC","authors":"Chenhui Feng, Caisheng Liu, Yuanhui Wu, Hui Qian","doi":"10.1007/s10470-025-02426-9","DOIUrl":null,"url":null,"abstract":"<div><p>Compressive sensing (CS) theory states that sparse signals can be sampled at a sub-Nyquist rate without information loss. The combination of CS and analog-to-digital converter (ADC) has demonstrated an effective reduction in the conversion rate. However, the majority of prior CS ADCs have not been successful in efficiently optimizing the quantization process. This paper proposes the predictive quantization method for the CS successive approximation register ADC. This approach not only reduces the conversion rate but also decreases the number of conversion bits. The pseudo-random sequence used in random demodulation, along with the previous value, serves as the basis for prediction to address the challenge that results from the randomness by mixing. With predictive quantization, the reduction in the number of bits per conversion contributes to improving overall power saving. The prototype circuit is designed in a 0.18-µm CMOS process. The simulation results indicate that the proposed ADC successfully reduces the average number of conversion bits to 6.97 bits for ECG signals when the resolution of ADC is 10 bits. There is approximately a 30% drop in the number of conversion bits.</p></div>","PeriodicalId":7827,"journal":{"name":"Analog Integrated Circuits and Signal Processing","volume":"124 1","pages":""},"PeriodicalIF":1.4000,"publicationDate":"2025-05-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A predictive quantization based compressive sensing SAR ADC for ECG signal\",\"authors\":\"Chenhui Feng, Caisheng Liu, Yuanhui Wu, Hui Qian\",\"doi\":\"10.1007/s10470-025-02426-9\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Compressive sensing (CS) theory states that sparse signals can be sampled at a sub-Nyquist rate without information loss. The combination of CS and analog-to-digital converter (ADC) has demonstrated an effective reduction in the conversion rate. However, the majority of prior CS ADCs have not been successful in efficiently optimizing the quantization process. This paper proposes the predictive quantization method for the CS successive approximation register ADC. This approach not only reduces the conversion rate but also decreases the number of conversion bits. The pseudo-random sequence used in random demodulation, along with the previous value, serves as the basis for prediction to address the challenge that results from the randomness by mixing. With predictive quantization, the reduction in the number of bits per conversion contributes to improving overall power saving. The prototype circuit is designed in a 0.18-µm CMOS process. The simulation results indicate that the proposed ADC successfully reduces the average number of conversion bits to 6.97 bits for ECG signals when the resolution of ADC is 10 bits. There is approximately a 30% drop in the number of conversion bits.</p></div>\",\"PeriodicalId\":7827,\"journal\":{\"name\":\"Analog Integrated Circuits and Signal Processing\",\"volume\":\"124 1\",\"pages\":\"\"},\"PeriodicalIF\":1.4000,\"publicationDate\":\"2025-05-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Analog Integrated Circuits and Signal Processing\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10470-025-02426-9\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Analog Integrated Circuits and Signal Processing","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10470-025-02426-9","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
A predictive quantization based compressive sensing SAR ADC for ECG signal
Compressive sensing (CS) theory states that sparse signals can be sampled at a sub-Nyquist rate without information loss. The combination of CS and analog-to-digital converter (ADC) has demonstrated an effective reduction in the conversion rate. However, the majority of prior CS ADCs have not been successful in efficiently optimizing the quantization process. This paper proposes the predictive quantization method for the CS successive approximation register ADC. This approach not only reduces the conversion rate but also decreases the number of conversion bits. The pseudo-random sequence used in random demodulation, along with the previous value, serves as the basis for prediction to address the challenge that results from the randomness by mixing. With predictive quantization, the reduction in the number of bits per conversion contributes to improving overall power saving. The prototype circuit is designed in a 0.18-µm CMOS process. The simulation results indicate that the proposed ADC successfully reduces the average number of conversion bits to 6.97 bits for ECG signals when the resolution of ADC is 10 bits. There is approximately a 30% drop in the number of conversion bits.
期刊介绍:
Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today.
A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.