Djaballah Merouane , Ayat Louiza , Ouchikh Rabah , Azzaz Mohammed Salah
{"title":"基于FPGA的高性能OTFS发射机:HLS/VHDL混合设计","authors":"Djaballah Merouane , Ayat Louiza , Ouchikh Rabah , Azzaz Mohammed Salah","doi":"10.1016/j.vlsi.2025.102542","DOIUrl":null,"url":null,"abstract":"<div><div>Rapid advances in high-speed vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications require innovative waveforms to address the challenges posed by mobility and the doubly dispersive nature of communication channels. Orthogonal Time Frequency Space (OTFS), a waveform operating in the delay-Doppler domain, offers enhanced robustness and performance under these conditions. This paper presents the implementation of an OTFS transmitter on a Field-Programmable Gate Array (FPGA), focusing on the ZedBoard platform. Two variants of the OTFS transmitter were developed and evaluated for data sizes of 16, 32, and 64 symbols. To benchmark their performance against conventional architectures, the implementations were re-evaluated on the 7vx485tfg1157-1 FPGA. The first variant achieved a throughput efficiency of 82.46 Tbps/W, utilizing 1,844 LUTs at an operating frequency of 147.8 MHz. The second variant demonstrated a higher throughput efficiency of 199.6 Tbps/W, consuming 3,094 LUTs with a maximum operating frequency of 149.52 MHz. These results highlight a significant improvement in performance while ensuring an optimal balance between resource utilization, latency, and throughput efficiency. This work underscores the potential of OTFS for real-time applications in future wireless networks, particularly in 6G communication scenarios.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"106 ","pages":"Article 102542"},"PeriodicalIF":2.5000,"publicationDate":"2025-09-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-performance OTFS transmitter on FPGA: A hybrid HLS/VHDL design\",\"authors\":\"Djaballah Merouane , Ayat Louiza , Ouchikh Rabah , Azzaz Mohammed Salah\",\"doi\":\"10.1016/j.vlsi.2025.102542\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Rapid advances in high-speed vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications require innovative waveforms to address the challenges posed by mobility and the doubly dispersive nature of communication channels. Orthogonal Time Frequency Space (OTFS), a waveform operating in the delay-Doppler domain, offers enhanced robustness and performance under these conditions. This paper presents the implementation of an OTFS transmitter on a Field-Programmable Gate Array (FPGA), focusing on the ZedBoard platform. Two variants of the OTFS transmitter were developed and evaluated for data sizes of 16, 32, and 64 symbols. To benchmark their performance against conventional architectures, the implementations were re-evaluated on the 7vx485tfg1157-1 FPGA. The first variant achieved a throughput efficiency of 82.46 Tbps/W, utilizing 1,844 LUTs at an operating frequency of 147.8 MHz. The second variant demonstrated a higher throughput efficiency of 199.6 Tbps/W, consuming 3,094 LUTs with a maximum operating frequency of 149.52 MHz. These results highlight a significant improvement in performance while ensuring an optimal balance between resource utilization, latency, and throughput efficiency. This work underscores the potential of OTFS for real-time applications in future wireless networks, particularly in 6G communication scenarios.</div></div>\",\"PeriodicalId\":54973,\"journal\":{\"name\":\"Integration-The Vlsi Journal\",\"volume\":\"106 \",\"pages\":\"Article 102542\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2025-09-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Integration-The Vlsi Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167926025001993\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001993","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
High-performance OTFS transmitter on FPGA: A hybrid HLS/VHDL design
Rapid advances in high-speed vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications require innovative waveforms to address the challenges posed by mobility and the doubly dispersive nature of communication channels. Orthogonal Time Frequency Space (OTFS), a waveform operating in the delay-Doppler domain, offers enhanced robustness and performance under these conditions. This paper presents the implementation of an OTFS transmitter on a Field-Programmable Gate Array (FPGA), focusing on the ZedBoard platform. Two variants of the OTFS transmitter were developed and evaluated for data sizes of 16, 32, and 64 symbols. To benchmark their performance against conventional architectures, the implementations were re-evaluated on the 7vx485tfg1157-1 FPGA. The first variant achieved a throughput efficiency of 82.46 Tbps/W, utilizing 1,844 LUTs at an operating frequency of 147.8 MHz. The second variant demonstrated a higher throughput efficiency of 199.6 Tbps/W, consuming 3,094 LUTs with a maximum operating frequency of 149.52 MHz. These results highlight a significant improvement in performance while ensuring an optimal balance between resource utilization, latency, and throughput efficiency. This work underscores the potential of OTFS for real-time applications in future wireless networks, particularly in 6G communication scenarios.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.