基于FPGA的高性能OTFS发射机:HLS/VHDL混合设计

IF 2.5 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Djaballah Merouane , Ayat Louiza , Ouchikh Rabah , Azzaz Mohammed Salah
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引用次数: 0

摘要

高速车对车(V2V)和车对基础设施(V2I)通信的快速发展需要创新的波形来应对移动性和通信渠道的双重分散特性带来的挑战。正交时频空间(OTFS)是一种工作在延迟多普勒域的波形,在这些条件下提供了增强的鲁棒性和性能。本文介绍了一种OTFS发射机在现场可编程门阵列(FPGA)上的实现,重点介绍了ZedBoard平台。开发了两种OTFS发射机的变体,并对数据大小分别为16、32和64个符号进行了评估。为了对传统架构的性能进行基准测试,在7vx485tfg1157-1 FPGA上对实现进行了重新评估。第一种变体实现了82.46 Tbps/W的吞吐量效率,在147.8 MHz的工作频率下利用1844个lut。第二种变体显示出更高的吞吐量效率,为199.6 Tbps/W,消耗3,094 lut,最大工作频率为149.52 MHz。这些结果突出了性能的显著改进,同时确保了资源利用、延迟和吞吐量效率之间的最佳平衡。这项工作强调了OTFS在未来无线网络中的实时应用潜力,特别是在6G通信场景中。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-performance OTFS transmitter on FPGA: A hybrid HLS/VHDL design
Rapid advances in high-speed vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications require innovative waveforms to address the challenges posed by mobility and the doubly dispersive nature of communication channels. Orthogonal Time Frequency Space (OTFS), a waveform operating in the delay-Doppler domain, offers enhanced robustness and performance under these conditions. This paper presents the implementation of an OTFS transmitter on a Field-Programmable Gate Array (FPGA), focusing on the ZedBoard platform. Two variants of the OTFS transmitter were developed and evaluated for data sizes of 16, 32, and 64 symbols. To benchmark their performance against conventional architectures, the implementations were re-evaluated on the 7vx485tfg1157-1 FPGA. The first variant achieved a throughput efficiency of 82.46 Tbps/W, utilizing 1,844 LUTs at an operating frequency of 147.8 MHz. The second variant demonstrated a higher throughput efficiency of 199.6 Tbps/W, consuming 3,094 LUTs with a maximum operating frequency of 149.52 MHz. These results highlight a significant improvement in performance while ensuring an optimal balance between resource utilization, latency, and throughput efficiency. This work underscores the potential of OTFS for real-time applications in future wireless networks, particularly in 6G communication scenarios.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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