PARoute2:通过性能驱动制导生成增强的模拟路由

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Peng Xu;Jindong Tu;Guojin Chen;Keren Zhu;Tinghuan Chen;Tsung-Yi Ho;Bei Yu
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引用次数: 0

摘要

模拟路由对于模拟电路设计中的性能优化至关重要,但通常需要大量的开发时间和设计专业知识。最近的研究试图使用机器学习(ML)来生成指导,以保持模拟路由后的电路性能。这些方法面临着诸如昂贵的数据采集和有偏见的指导等挑战。本文介绍了AnalogFold,这是一种新的模拟路由范例,利用ML提供面向性能的路由指导。我们的方法学习性能驱动的路由指导,并使用它来帮助自动路由器进行性能驱动的路由优化。我们建议使用包含成本感知距离的3DGNN来准确预测布局后的性能。池辅助电位松弛过程导出了有效的路由引导。在台积电40纳米技术节点下的多个基准测试上的实验结果表明,与现有的前沿技术相比,所提出的框架具有优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
PARoute2: Enhanced Analog Routing via Performance-Drive Guidance Generation
Analog routing is crucial for performance optimization in analog circuit design, but conventionally takes significant development time and requires design expertise. Recent research has attempted to use machine learning (ML) to generate guidance to preserve circuit performance after analog routing. These methods face challenges such as expensive data acquisition and biased guidance. This article presents AnalogFold, a new paradigm of analog routing that leverages ML to provide performance-oriented routing guidance. Our approach learns performance-driven routing guidance and uses it to help automatic routers for performance-driven routing optimization. We propose to use a 3DGNN that incorporates cost-aware distance to make accurate predictions on post-layout performance. A pool-assisted potential relaxation process derives the effective routing guidance. The experimental results on multiple benchmarks under the TSMC 40 nm technology node demonstrate the superiority of the proposed framework compared to the cutting-edge works.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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