基于二值化卷积神经网络的片上学习高效心电分类器。

IF 4.9
Rui Zhang, Ranran Zhou, Xinyi Han, Haifeng Qi, Yong Wang
{"title":"基于二值化卷积神经网络的片上学习高效心电分类器。","authors":"Rui Zhang, Ranran Zhou, Xinyi Han, Haifeng Qi, Yong Wang","doi":"10.1109/TBCAS.2025.3610879","DOIUrl":null,"url":null,"abstract":"<p><p>In ECG classification applications, binarized convolutional neural networks (bCNNs) show great potential to achieve extremely low power consumption through 1-bit quantization. Existing bCNN approaches typically extract spatial features from the full ECG image without leveraging its sparsity, thereby introducing unnecessary computations and hardware resources. Meanwhile, inter-patient variability of ECG features degrades the classification performance due to accuracy loss caused by the binarization operation. To address these challenges, this paper proposes an energy-efficient ECG classifier based on a bCNN with on-chip learning. A patch-by-patch computation approach is used to reduce both power consumption and memory usage. Instead of processing the entire image, the ECG image is divided into small patches, and only the patches containing valid data are involved in feature extraction. An on-chip learning method is employed to improve classification accuracy among patients by updating the model weights using both the acquired bCNN features and the R-peak interval data. In addition, a reconfigurable convolutional processing element array and a base-2 softmax structure are designed to further reduce the hardware resources. The proposed classifier is verified on an FPGA, achieving a classification accuracy of 97.55% and a specificity of 89.15%. Synthesized using a 55 nm CMOS process, the ECG classifier occupies an area of 0.43 mm<sup>2</sup>. With a supply voltage of 1.2 V, the classifier consumes an average energy of 0.12 $μ$J per classification and 0.09 $μ$J per on-chip learning, making it suitable for wearable ECG classification application.</p>","PeriodicalId":94031,"journal":{"name":"IEEE transactions on biomedical circuits and systems","volume":"PP ","pages":""},"PeriodicalIF":4.9000,"publicationDate":"2025-09-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Energy-Efficient ECG Classifier with On-Chip Learning Using Binarized Convolutional Neural Network.\",\"authors\":\"Rui Zhang, Ranran Zhou, Xinyi Han, Haifeng Qi, Yong Wang\",\"doi\":\"10.1109/TBCAS.2025.3610879\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p><p>In ECG classification applications, binarized convolutional neural networks (bCNNs) show great potential to achieve extremely low power consumption through 1-bit quantization. Existing bCNN approaches typically extract spatial features from the full ECG image without leveraging its sparsity, thereby introducing unnecessary computations and hardware resources. Meanwhile, inter-patient variability of ECG features degrades the classification performance due to accuracy loss caused by the binarization operation. To address these challenges, this paper proposes an energy-efficient ECG classifier based on a bCNN with on-chip learning. A patch-by-patch computation approach is used to reduce both power consumption and memory usage. Instead of processing the entire image, the ECG image is divided into small patches, and only the patches containing valid data are involved in feature extraction. An on-chip learning method is employed to improve classification accuracy among patients by updating the model weights using both the acquired bCNN features and the R-peak interval data. In addition, a reconfigurable convolutional processing element array and a base-2 softmax structure are designed to further reduce the hardware resources. The proposed classifier is verified on an FPGA, achieving a classification accuracy of 97.55% and a specificity of 89.15%. Synthesized using a 55 nm CMOS process, the ECG classifier occupies an area of 0.43 mm<sup>2</sup>. With a supply voltage of 1.2 V, the classifier consumes an average energy of 0.12 $μ$J per classification and 0.09 $μ$J per on-chip learning, making it suitable for wearable ECG classification application.</p>\",\"PeriodicalId\":94031,\"journal\":{\"name\":\"IEEE transactions on biomedical circuits and systems\",\"volume\":\"PP \",\"pages\":\"\"},\"PeriodicalIF\":4.9000,\"publicationDate\":\"2025-09-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE transactions on biomedical circuits and systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/TBCAS.2025.3610879\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE transactions on biomedical circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TBCAS.2025.3610879","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

在心电分类应用中,二值化卷积神经网络(bCNNs)通过1位量化实现极低功耗显示出巨大的潜力。现有的bCNN方法通常从完整的心电图像中提取空间特征,而没有利用其稀疏性,从而引入了不必要的计算和硬件资源。同时,由于二值化操作导致准确率下降,患者间ECG特征的可变性降低了分类性能。为了解决这些问题,本文提出了一种基于片上学习的bCNN的高效心电分类器。采用逐块计算的方法来降低功耗和内存使用。该方法不是对整个图像进行处理,而是将心电图像分割成小块,只对包含有效数据的小块进行特征提取。采用片上学习方法,利用获取的bCNN特征和r峰区间数据更新模型权值,提高患者之间的分类准确率。此外,设计了可重构的卷积处理单元阵列和基数为2的softmax结构,进一步减少了硬件资源。在FPGA上对该分类器进行了验证,分类准确率为97.55%,特异性为89.15%。心电分类器采用55 nm CMOS工艺合成,占地0.43 mm2。该分类器在1.2 V的供电电压下,每次分类平均能耗为0.12 $μ$J,每次片上学习平均能耗为0.09 $μ$J,适合穿戴式心电分类应用。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An Energy-Efficient ECG Classifier with On-Chip Learning Using Binarized Convolutional Neural Network.

In ECG classification applications, binarized convolutional neural networks (bCNNs) show great potential to achieve extremely low power consumption through 1-bit quantization. Existing bCNN approaches typically extract spatial features from the full ECG image without leveraging its sparsity, thereby introducing unnecessary computations and hardware resources. Meanwhile, inter-patient variability of ECG features degrades the classification performance due to accuracy loss caused by the binarization operation. To address these challenges, this paper proposes an energy-efficient ECG classifier based on a bCNN with on-chip learning. A patch-by-patch computation approach is used to reduce both power consumption and memory usage. Instead of processing the entire image, the ECG image is divided into small patches, and only the patches containing valid data are involved in feature extraction. An on-chip learning method is employed to improve classification accuracy among patients by updating the model weights using both the acquired bCNN features and the R-peak interval data. In addition, a reconfigurable convolutional processing element array and a base-2 softmax structure are designed to further reduce the hardware resources. The proposed classifier is verified on an FPGA, achieving a classification accuracy of 97.55% and a specificity of 89.15%. Synthesized using a 55 nm CMOS process, the ECG classifier occupies an area of 0.43 mm2. With a supply voltage of 1.2 V, the classifier consumes an average energy of 0.12 $μ$J per classification and 0.09 $μ$J per on-chip learning, making it suitable for wearable ECG classification application.

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