利用圆形布局晶体管提高器件性能:CDGT与CSNT的比较研究

IF 3.3 3区 材料科学 Q3 CHEMISTRY, PHYSICAL
Silicon Pub Date : 2025-07-16 DOI:10.1007/s12633-025-03381-w
Sagar Kallepelli, Satish Maheshwaram, Kiran Kumar P.
{"title":"利用圆形布局晶体管提高器件性能:CDGT与CSNT的比较研究","authors":"Sagar Kallepelli,&nbsp;Satish Maheshwaram,&nbsp;Kiran Kumar P.","doi":"10.1007/s12633-025-03381-w","DOIUrl":null,"url":null,"abstract":"<div><p>Circular layout Transistors provide an effective approach to mitigating short-channel effects (SCEs) in advanced technology nodes. This study explores the design and simulation of Circular Double Gate Transistors (CDGTs) and Circular Stacked Nanosheet Transistors (CSNTs) for high-performance (HP) applications at a 10 nm gate length. The devices were designed using gds2mesh process and evaluated through fully calibrated TCAD simulations to analyze both DC and analog/RF performance. The CSNT exhibited superior DC characteristics, achieving the highest ON-state drive current (I<sub>ON</sub>) of 2.27 × 10<sup>–3</sup> A and the lowest OFF-state leakage current (I<sub>OFF</sub>) of 5.38 × 10<sup>–9</sup> A. Furthermore, it demonstrated an impressive switching ratio (I<sub>ON</sub>/I<sub>OFF</sub>) of 4.23 × 10<sup>5</sup>, marking a 3.7 × improvement over the CDGT. The CSNT also outperformed the CDGT in analog/RF performance, reinforcing its potential for next-generation nanoelectronic applications. These findings establish CSNTs as promising candidates for future transistor architectures, offering enhanced scalability and performance in advanced semiconductor technologies.</p></div>","PeriodicalId":776,"journal":{"name":"Silicon","volume":"17 12","pages":"2899 - 2907"},"PeriodicalIF":3.3000,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Enhancing Device Performance with Circular Layout Transistors: A Comparative Study of CDGT and CSNT\",\"authors\":\"Sagar Kallepelli,&nbsp;Satish Maheshwaram,&nbsp;Kiran Kumar P.\",\"doi\":\"10.1007/s12633-025-03381-w\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Circular layout Transistors provide an effective approach to mitigating short-channel effects (SCEs) in advanced technology nodes. This study explores the design and simulation of Circular Double Gate Transistors (CDGTs) and Circular Stacked Nanosheet Transistors (CSNTs) for high-performance (HP) applications at a 10 nm gate length. The devices were designed using gds2mesh process and evaluated through fully calibrated TCAD simulations to analyze both DC and analog/RF performance. The CSNT exhibited superior DC characteristics, achieving the highest ON-state drive current (I<sub>ON</sub>) of 2.27 × 10<sup>–3</sup> A and the lowest OFF-state leakage current (I<sub>OFF</sub>) of 5.38 × 10<sup>–9</sup> A. Furthermore, it demonstrated an impressive switching ratio (I<sub>ON</sub>/I<sub>OFF</sub>) of 4.23 × 10<sup>5</sup>, marking a 3.7 × improvement over the CDGT. The CSNT also outperformed the CDGT in analog/RF performance, reinforcing its potential for next-generation nanoelectronic applications. These findings establish CSNTs as promising candidates for future transistor architectures, offering enhanced scalability and performance in advanced semiconductor technologies.</p></div>\",\"PeriodicalId\":776,\"journal\":{\"name\":\"Silicon\",\"volume\":\"17 12\",\"pages\":\"2899 - 2907\"},\"PeriodicalIF\":3.3000,\"publicationDate\":\"2025-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Silicon\",\"FirstCategoryId\":\"88\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s12633-025-03381-w\",\"RegionNum\":3,\"RegionCategory\":\"材料科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"CHEMISTRY, PHYSICAL\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Silicon","FirstCategoryId":"88","ListUrlMain":"https://link.springer.com/article/10.1007/s12633-025-03381-w","RegionNum":3,"RegionCategory":"材料科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"CHEMISTRY, PHYSICAL","Score":null,"Total":0}
引用次数: 0

摘要

圆形布局晶体管提供了一种有效的方法来缓解先进技术节点中的短通道效应。本研究探讨了用于高性能(HP)应用的圆形双栅晶体管(cdgt)和圆形堆叠纳米片晶体管(csnt)在10nm栅极长度上的设计和仿真。这些器件采用gds2mesh工艺设计,并通过完全校准的TCAD仿真进行评估,以分析DC和模拟/RF性能。CSNT具有优异的直流特性,最大导通状态驱动电流(ION)为2.27 × 10 - 3a,最小关断状态漏电流(IOFF)为5.38 × 10 - 9a。此外,它还显示了令人印象深刻的开关比(ION/IOFF)为4.23 × 105,比CDGT提高了3.7倍。CSNT在模拟/射频性能方面也优于CDGT,增强了其在下一代纳米电子应用中的潜力。这些发现确立了csnt作为未来晶体管架构的有希望的候选者,在先进的半导体技术中提供增强的可扩展性和性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Enhancing Device Performance with Circular Layout Transistors: A Comparative Study of CDGT and CSNT

Circular layout Transistors provide an effective approach to mitigating short-channel effects (SCEs) in advanced technology nodes. This study explores the design and simulation of Circular Double Gate Transistors (CDGTs) and Circular Stacked Nanosheet Transistors (CSNTs) for high-performance (HP) applications at a 10 nm gate length. The devices were designed using gds2mesh process and evaluated through fully calibrated TCAD simulations to analyze both DC and analog/RF performance. The CSNT exhibited superior DC characteristics, achieving the highest ON-state drive current (ION) of 2.27 × 10–3 A and the lowest OFF-state leakage current (IOFF) of 5.38 × 10–9 A. Furthermore, it demonstrated an impressive switching ratio (ION/IOFF) of 4.23 × 105, marking a 3.7 × improvement over the CDGT. The CSNT also outperformed the CDGT in analog/RF performance, reinforcing its potential for next-generation nanoelectronic applications. These findings establish CSNTs as promising candidates for future transistor architectures, offering enhanced scalability and performance in advanced semiconductor technologies.

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来源期刊
Silicon
Silicon CHEMISTRY, PHYSICAL-MATERIALS SCIENCE, MULTIDISCIPLINARY
CiteScore
5.90
自引率
20.60%
发文量
685
审稿时长
>12 weeks
期刊介绍: The journal Silicon is intended to serve all those involved in studying the role of silicon as an enabling element in materials science. There are no restrictions on disciplinary boundaries provided the focus is on silicon-based materials or adds significantly to the understanding of such materials. Accordingly, such contributions are welcome in the areas of inorganic and organic chemistry, physics, biology, engineering, nanoscience, environmental science, electronics and optoelectronics, and modeling and theory. Relevant silicon-based materials include, but are not limited to, semiconductors, polymers, composites, ceramics, glasses, coatings, resins, composites, small molecules, and thin films.
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