利用流量注入和服务质量来控制重新配置延迟

IF 4.1 2区 计算机科学 Q1 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Giacomo Valente , Vittoriano Muttillo , Fabio Federici , Luigi Pomante , Tania Di Mascio
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引用次数: 0

摘要

现代实时嵌入式系统越来越多地使用运行时可重构架构来减小尺寸、重量和功耗,同时确保可预测性。但是,重新配置延迟是不可忽略的,并且由于资源争用而变化。与现有的影响系统资源或时间的解决方案不同,本文提出了一种方法和工具,通过精确建模争用来提供安全、紧密的重构延迟,而不需要额外的资源使用,并且适用于大多数嵌入式片上系统。此外,通过使用现代片上系统中可用的服务质量机制,所提出的方法允许设计人员设置重新配置延迟的上限,并保持它不受竞争任务的干扰。为了评估所提出的方法,我们提出了两个实验,将其应用于Xilinx Zynq UltraScale+平台上的代表性配置。实验结果表明,在诱导最坏干扰情况下,重构延迟边界保持不变,确保在高负载条件下,重构延迟可达到隔离状态下的6.3倍。此外,该方法可以自动生成服务质量配置,确保最大重新配置延迟为其隔离值的1.8倍,竞争对手的延迟仅为14%,并且没有额外的资源消耗,优于现有的技术水平。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Leveraging traffic injection and quality-of-service to control the reconfiguration delay
Modern real-time embedded systems increasingly use runtime reconfigurable architectures to reduce size, weight, and power while ensuring predictability. However, reconfiguration delay is non-negligible and varies due to resource contention. Unlike existing solutions that affect system resources or timing, this paper presents an approach and tools to provide a safe, tight reconfiguration delay bound by accurately modeling contention, without additional resource usage, and applicable to most embedded Systems-on-Chip. Additionally, by using Quality-of-Service mechanisms available in modern systems-on-chip, the proposed approach allows designers to set an upper limit for the reconfiguration delay and maintain it against interference from competing tasks. To evaluate the proposed approach, we present two experiments in which it is applied to a representative configuration on a Xilinx Zynq UltraScale+ platform. Experimental results indicate that the reconfiguration delay bound holds under induced worst-case interference scenarios, ensuring that, under heavy workload conditions, the reconfiguration delay can be up to 6.3 times its value in isolation. Moreover, the approach can automatically generate a quality-of-service configuration that ensures a maximum reconfiguration delay 1.8 times its value in isolation, with only a 14% slowdown on contenders and no additional resource consumption, outperforming the existing state of the art.
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来源期刊
Journal of Systems Architecture
Journal of Systems Architecture 工程技术-计算机:硬件
CiteScore
8.70
自引率
15.60%
发文量
226
审稿时长
46 days
期刊介绍: The Journal of Systems Architecture: Embedded Software Design (JSA) is a journal covering all design and architectural aspects related to embedded systems and software. It ranges from the microarchitecture level via the system software level up to the application-specific architecture level. Aspects such as real-time systems, operating systems, FPGA programming, programming languages, communications (limited to analysis and the software stack), mobile systems, parallel and distributed architectures as well as additional subjects in the computer and system architecture area will fall within the scope of this journal. Technology will not be a main focus, but its use and relevance to particular designs will be. Case studies are welcome but must contribute more than just a design for a particular piece of software. Design automation of such systems including methodologies, techniques and tools for their design as well as novel designs of software components fall within the scope of this journal. Novel applications that use embedded systems are also central in this journal. While hardware is not a part of this journal hardware/software co-design methods that consider interplay between software and hardware components with and emphasis on software are also relevant here.
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