设计,实现和基于rfsoc的多路径射频前端的宽带频谱分析验证

IF 7.9 Q1 ENGINEERING, MULTIDISCIPLINARY
Gergo Kovacs , Raluca Nelega , Alexandru Oprea , Botond Kirei , Emanoil Surducan , Vasile Surducan , Romulus Valeriu Flaviu Turcu , Emanuel Puschita
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引用次数: 0

摘要

本文介绍了一种可扩展的多路径射频(RF)前端的设计、实现和验证,旨在扩展sdr类系统的频谱分析能力。该架构具有五个单独滤波的接收路径和一个可调谐的本地振荡器(LO),支持直接采样和频率下变频,以实现10 MHz-8 GHz范围内的干净采集。采用仿真指导方法,使用定制的谐波感知仿真框架,对谐波失真和混叠行为进行建模,以告知最佳LO选择和滤波器规划。前端采用高性能离散元件实现,每条路径都经过定制,以确保在非线性条件下的频谱隔离和无混叠操作。通过三个专用的测量装置和三个独立的采集装置进行了全面的实验表征。关键指标包括插入损耗(11-26 dB)、噪声系数(13-39 dB)、1 dB压缩点(高达12.8 dBm)和三阶线性度,OIP3值达到30 dBm, IIP3超过45 dBm。群延迟以10 MHz的分辨率直接测量,并保持在10 - 15 ns的亚纳秒变化范围内。所有测量均使用校准的高精度射频仪器获得,以确保可追溯性和一致性。通过与RealDigital RFSoC 4x2板的实时集成进行功能验证,确认所有接收路径上的全频段信号采集和频率转换。离散组件架构确保了可复制性、透明性和设计灵活性,使其非常适合需要宽带、低失真和高动态范围RF前端的高级频谱监测、认知无线电系统和可重构SDR平台。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

Design, implementation, and RFSoC-based validation of a multi-path RF front-end for wideband spectrum analysis

Design, implementation, and RFSoC-based validation of a multi-path RF front-end for wideband spectrum analysis
This paper presents the design, implementation, and validation of a scalable multi-path radio frequency (RF) front-end engineered to extend the spectral analysis capabilities of SDR-class systems. The architecture features five individually filtered reception paths and a tunable local oscillator (LO), supporting both direct sampling and frequency down-conversion to enable clean acquisition across the 10 MHz–8 GHz range. A simulation-guided methodology was employed using a custom harmonic-aware simulation framework that models harmonic distortion and aliasing behavior to inform optimal LO selection and filter planning. The front-end was realized with high-performance discrete components, with each path tailored to ensure spectral isolation and alias-free operation under nonlinear conditions. Comprehensive experimental characterization was performed through three dedicated measurement setups and three independent acquisition sets. Key metrics include insertion loss (11–26 dB), noise figure (13–39 dB), 1 dB compression point (up to 12.8 dBm), and third-order linearity, with OIP3 values reaching 30 dBm and IIP3 exceeding 45 dBm. Group delay was directly measured with 10 MHz resolution and remained confined within 10–15 ns with sub-nanosecond variation. All measurements were obtained using calibrated, high-precision RF instrumentation to ensure traceability and consistency. Functional validation was conducted through real-time integration with a RealDigital RFSoC 4x2 board, confirming full-band signal acquisition and frequency translation across all reception paths. The discrete-component architecture ensures replicability, transparency, and design flexibility, making it well suited for advanced spectrum monitoring, cognitive radio systems, and reconfigurable SDR platforms requiring wideband, low-distortion, and high-dynamic-range RF front-ends.
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来源期刊
Results in Engineering
Results in Engineering Engineering-Engineering (all)
CiteScore
5.80
自引率
34.00%
发文量
441
审稿时长
47 days
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