基于注意机制的脑电癫痫检测动态通道选择IP设计

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Ying Wang , Lixun Wang , Yuejun Zhang , Yi Gong , Hanyu Shi , Huihong Zhang , Pengjun Wang
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引用次数: 0

摘要

癫痫是一种普遍存在的神经系统疾病,需要在可穿戴设备中进行低成本的快速检测,因此本研究提出了一种通道注意机制(CAM)和卷积神经网络(CNN)混合框架,该框架可以减轻冗余脑电图(EEG)通道干扰,并通过动态通道选择增强跨患者的推广。该框架利用CAM动态选择跨患者/时间点的高信息脑电信号通道,通过特征交互分析消除冗余,并将其输入CNN进行特征提取和分类。然后,使用全局平均池化(GAP)和扩展卷积等轻量级处理手段来减少神经元数量和网络复杂性,并结合bitonic排序和脉冲阵列等并行化手段来实现低延迟效果。硬件IP采用16位混合精度定点编码和串并联组合架构进行设计。该设计采用台积电65nm制程,在1V/20MHz条件下,以0.206μJ/class的能效和37.28μs的延迟(比其他设计快5-10倍),实现了97.1%的精度,存储空间减少了77%,核心面积减少了1.38mm2。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Attention mechanism based IP design for dynamic channel selection in EEG epilepsy detect
Epilepsy, a prevalent neurological disorder requiring low-cost rapid detection in wearable devices, prompts this study to propose a channel attention mechanism(CAM) and convolutional neural network(CNN) hybrid framework that mitigates redundant electroencephalogram(EEG) channel interference and enhances cross-patient generalization through dynamic channel selection. The framework uses CAM to dynamically selects high-information EEG channels across patients/timepoints, eliminating redundancy through feature interaction analysis and feeds them into the CNN to carry out the feature extraction and classification.Then, lightweight processing means such as global average pooling(GAP) and dilated convolution are used to reduce the number of neurons and network complexity, and parallelisation means such as bitonic sorting and pulsed arrays are combined to achieve low-latency effects. Moreover, the hardware IP is designed under the 16-bit mixed-precision fixed-point coding and serial-parallel combination architecture. Implemented on TSMC 65nm process, the design achieves 97.1% accuracy with 77% storage reduction, 1.38mm2 core area, and 37.28μs latency (5-10× faster than others) at 0.206μJ/class energy efficiency under 1V/20MHz conditions.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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