Design of a SRAM memory cell with enhanced stability and variability for embedded biomedical applications

Embedded biomedical applications need low-power of operation and high-speed to meet the requirements of portability and fast response time. This can be achieved by improving the design of embedded memories. An SRAM cell has been reported in this work with eleven 18 nm FinFET devices. To minimize the write delay, transmission gate approach is used, which also improves the variability performance as analyzed through Monte Carlo simulations. Leakage control transistors and pmos-pmos-nmos (PPN) based inverters have been incorporated to reduce power and improve pull-up strength, respectively. Read decoupling technique has been used to separate the read-write operations. Titled as 11TLCTG SRAM cell, the design is analyzed using Cadence Virtuoso tool and the effects of process corners-voltage-temperature (PVT) variations are studied as well. It has a power consumption of 18.01 nW, 20.91 nW, and 3.58 μW during write, hold and read operations, respectively, and has excellent stability parameter values. Its write stability is 1.36x, 1.47x, 1.23x, 5.54x and 1.09x better and read stability is 2x, 1.04x, 1.04x, 1.23x, and 2.09x better than that of the contemporary designs considered for comparison purposes. The proposed design occupies the area of 4.7 μm² and mitigates half select issues, which makes it ideal for building large memory arrays.