High-Capacity DFF Cells for Unary Computing Using Single-Flux Quantum Circuits

Due to their high-speed operation and low power consumption, single-flux quantum (SFQ) circuits are promising technologies for integrated circuits. However, current superconducting fabrication limitations impose strict area constraints, challenging the construction of large-scale systems. Unary computing (UC) encodes numerical values by concentrating all “1”s at the beginning of a bit sequence. This approach enables arithmetic operations with fewer logic gates, thereby improving the area efficiency. In this article, we propose a novel high-capacity D flip-flop (HC-DFF) cell for UC-based SFQ circuits that achieves high-density data registration while preserving UC encoding. The HC-DFF employs a cascaded storage loop structure in which each loop sequentially stores one flux quantum, avoiding the margin deterioration associated with storing multiple flux quanta in a single loop. Simulation shows that the proposed HC-DFF achieves a bias margin of –20.8% to +32.7% and supports read/write operations above 100 GHz. We fabricated the HC-DFF using a 10 kA/cm² Nb four-layer superconducting process and verified its operation through low-speed measurements. The HC-DFF offers enhanced scalability and stability while reducing the number of required Josephson junctions by 83.3% per bit compared to conventional DFF-based shift registers for saving UC signals. For short unary sequences of less than 31 bits, it retains an advantage over storing binary data with equivalent precision using conventional DFF-based shift registers.