{"title":"基于Minimap2的第三代基因组测序高效CPU-FPGA异构加速系统","authors":"Jialei Sun;Lingyi Liu;Kunyue Li;Shuaipeng Li;Sai Gao;Zizheng Dong;Jianfei Jiang;Fangzhen Wu","doi":"10.1109/TCSII.2025.3588409","DOIUrl":null,"url":null,"abstract":"Minimap2 has become a widely used software for third-generation long-read genomic sequencing. Due to the increasing complexity of data processing with long-read sequences, the analysis is computationally intensive and energy-consuming. This brief presents an end-to-end CPU-FPGA heterogeneous acceleration system for Minimap2 focusing on chaining operation, in which multi-threaded software is on the CPU, and a multi-kernel accelerator for chaining operation is on the FPGA. This brief can hold the high thread number of modern CPUs to maximize performance and energy efficiency. Hardware-efficient kernel design, software-hardware co-optimization, and memory access fusion techniques have been applied to achieve higher computational performance with less power consumption. This brief achieves at most <inline-formula> <tex-math>$2.01\\times $ </tex-math></inline-formula> acceleration against software and <inline-formula> <tex-math>$1.65\\times $ </tex-math></inline-formula> against the baseline, and EDP reduction of 72% against software and 59% against the baseline, outperforming state-of-the-art designs. The code of our acceleration system is available on GitHub, together with FPGA bitstream.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1278-1282"},"PeriodicalIF":4.9000,"publicationDate":"2025-07-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An Energy-Efficient CPU–FPGA Heterogeneous Acceleration System for Third-Generation Genomic Sequencing Based on Minimap2\",\"authors\":\"Jialei Sun;Lingyi Liu;Kunyue Li;Shuaipeng Li;Sai Gao;Zizheng Dong;Jianfei Jiang;Fangzhen Wu\",\"doi\":\"10.1109/TCSII.2025.3588409\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Minimap2 has become a widely used software for third-generation long-read genomic sequencing. Due to the increasing complexity of data processing with long-read sequences, the analysis is computationally intensive and energy-consuming. This brief presents an end-to-end CPU-FPGA heterogeneous acceleration system for Minimap2 focusing on chaining operation, in which multi-threaded software is on the CPU, and a multi-kernel accelerator for chaining operation is on the FPGA. This brief can hold the high thread number of modern CPUs to maximize performance and energy efficiency. Hardware-efficient kernel design, software-hardware co-optimization, and memory access fusion techniques have been applied to achieve higher computational performance with less power consumption. This brief achieves at most <inline-formula> <tex-math>$2.01\\\\times $ </tex-math></inline-formula> acceleration against software and <inline-formula> <tex-math>$1.65\\\\times $ </tex-math></inline-formula> against the baseline, and EDP reduction of 72% against software and 59% against the baseline, outperforming state-of-the-art designs. The code of our acceleration system is available on GitHub, together with FPGA bitstream.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"72 9\",\"pages\":\"1278-1282\"},\"PeriodicalIF\":4.9000,\"publicationDate\":\"2025-07-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11079624/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11079624/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
An Energy-Efficient CPU–FPGA Heterogeneous Acceleration System for Third-Generation Genomic Sequencing Based on Minimap2
Minimap2 has become a widely used software for third-generation long-read genomic sequencing. Due to the increasing complexity of data processing with long-read sequences, the analysis is computationally intensive and energy-consuming. This brief presents an end-to-end CPU-FPGA heterogeneous acceleration system for Minimap2 focusing on chaining operation, in which multi-threaded software is on the CPU, and a multi-kernel accelerator for chaining operation is on the FPGA. This brief can hold the high thread number of modern CPUs to maximize performance and energy efficiency. Hardware-efficient kernel design, software-hardware co-optimization, and memory access fusion techniques have been applied to achieve higher computational performance with less power consumption. This brief achieves at most $2.01\times $ acceleration against software and $1.65\times $ against the baseline, and EDP reduction of 72% against software and 59% against the baseline, outperforming state-of-the-art designs. The code of our acceleration system is available on GitHub, together with FPGA bitstream.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.