{"title":"HBM体系结构中两层ECC纠错新方法","authors":"Jaeil Lim;Jaewon Chung;Donghun Jeong;Daegeun Jee;Euicheol Lim","doi":"10.1109/TCSII.2025.3593226","DOIUrl":null,"url":null,"abstract":"HBM (high bandwidth memory) is an emerging technology for high performance computing, but it has a different structure from traditional memory, and thus a new solution is needed. In this brief, we present an ECC (error correcting code) configuration method for SWD (sub-wordline driver) fault correction in the two-tiered ECC structure of HBM. Existing method does not have the correction capability to cover the entire range of a SWD cluster fault. In this brief, the SWD fault correction capability of the proposed method is presented through mathematical inference. And the simulation results also showed the same correction capability as the inference. And it shows the result of reducing the overhead and latency of encoder and decoder hardware when compared to the existing method.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1293-1297"},"PeriodicalIF":4.9000,"publicationDate":"2025-07-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A New Two-Tiered ECC Configuration Method for Cluster Error Correction in HBM Architecture\",\"authors\":\"Jaeil Lim;Jaewon Chung;Donghun Jeong;Daegeun Jee;Euicheol Lim\",\"doi\":\"10.1109/TCSII.2025.3593226\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"HBM (high bandwidth memory) is an emerging technology for high performance computing, but it has a different structure from traditional memory, and thus a new solution is needed. In this brief, we present an ECC (error correcting code) configuration method for SWD (sub-wordline driver) fault correction in the two-tiered ECC structure of HBM. Existing method does not have the correction capability to cover the entire range of a SWD cluster fault. In this brief, the SWD fault correction capability of the proposed method is presented through mathematical inference. And the simulation results also showed the same correction capability as the inference. And it shows the result of reducing the overhead and latency of encoder and decoder hardware when compared to the existing method.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"72 9\",\"pages\":\"1293-1297\"},\"PeriodicalIF\":4.9000,\"publicationDate\":\"2025-07-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11098724/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11098724/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A New Two-Tiered ECC Configuration Method for Cluster Error Correction in HBM Architecture
HBM (high bandwidth memory) is an emerging technology for high performance computing, but it has a different structure from traditional memory, and thus a new solution is needed. In this brief, we present an ECC (error correcting code) configuration method for SWD (sub-wordline driver) fault correction in the two-tiered ECC structure of HBM. Existing method does not have the correction capability to cover the entire range of a SWD cluster fault. In this brief, the SWD fault correction capability of the proposed method is presented through mathematical inference. And the simulation results also showed the same correction capability as the inference. And it shows the result of reducing the overhead and latency of encoder and decoder hardware when compared to the existing method.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.