Seunghoon Lee;Sungbeom Kim;Donghun Lee;Inho Choi;Ho-Jin Song
{"title":"一种5G直接转换发射机I/Q不平衡校正方案","authors":"Seunghoon Lee;Sungbeom Kim;Donghun Lee;Inho Choi;Ho-Jin Song","doi":"10.1109/TCSII.2025.3586873","DOIUrl":null,"url":null,"abstract":"This brief presents an I/Q imbalance calibration scheme for a 5G direct-conversion transmitter (TX). By utilizing a simple 1-bit phase-to-digital converter and 9-bit digital-to-analog converter, a quadrature phase error associated with fabrication tolerances can be minimized effectively using a binary search algorithm. This approach implements a continuous, real-time calibration that adaptively adjusts the resistive components of the type-I polyphase filter in response to detected phase errors, thereby ensuring precise phase alignment by dynamically compensating for I/Q imbalance without interrupting the primary signal path. The proposed idea is demonstrated in the LO path of a 5G direct-conversion transmitter in a 65-nm bulk CMOS technology. The measured image rejection ratio and LO feedthrough suppression ratio are maintained less than −52 dBc and −37 dBc, respectively, in the range of 27.5-29.5 GHz. The TX can support a peak data rate of 4.8 Gb/s at 28.5 GHz using 64-QAM and an error vector magnitude of −27.3 dB.","PeriodicalId":13101,"journal":{"name":"IEEE Transactions on Circuits and Systems II: Express Briefs","volume":"72 9","pages":"1198-1202"},"PeriodicalIF":4.9000,"publicationDate":"2025-07-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An I/Q Imbalance Calibration Scheme for 5G Direct-Conversion Transmitter\",\"authors\":\"Seunghoon Lee;Sungbeom Kim;Donghun Lee;Inho Choi;Ho-Jin Song\",\"doi\":\"10.1109/TCSII.2025.3586873\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This brief presents an I/Q imbalance calibration scheme for a 5G direct-conversion transmitter (TX). By utilizing a simple 1-bit phase-to-digital converter and 9-bit digital-to-analog converter, a quadrature phase error associated with fabrication tolerances can be minimized effectively using a binary search algorithm. This approach implements a continuous, real-time calibration that adaptively adjusts the resistive components of the type-I polyphase filter in response to detected phase errors, thereby ensuring precise phase alignment by dynamically compensating for I/Q imbalance without interrupting the primary signal path. The proposed idea is demonstrated in the LO path of a 5G direct-conversion transmitter in a 65-nm bulk CMOS technology. The measured image rejection ratio and LO feedthrough suppression ratio are maintained less than −52 dBc and −37 dBc, respectively, in the range of 27.5-29.5 GHz. The TX can support a peak data rate of 4.8 Gb/s at 28.5 GHz using 64-QAM and an error vector magnitude of −27.3 dB.\",\"PeriodicalId\":13101,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"volume\":\"72 9\",\"pages\":\"1198-1202\"},\"PeriodicalIF\":4.9000,\"publicationDate\":\"2025-07-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems II: Express Briefs\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11073570/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems II: Express Briefs","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11073570/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
An I/Q Imbalance Calibration Scheme for 5G Direct-Conversion Transmitter
This brief presents an I/Q imbalance calibration scheme for a 5G direct-conversion transmitter (TX). By utilizing a simple 1-bit phase-to-digital converter and 9-bit digital-to-analog converter, a quadrature phase error associated with fabrication tolerances can be minimized effectively using a binary search algorithm. This approach implements a continuous, real-time calibration that adaptively adjusts the resistive components of the type-I polyphase filter in response to detected phase errors, thereby ensuring precise phase alignment by dynamically compensating for I/Q imbalance without interrupting the primary signal path. The proposed idea is demonstrated in the LO path of a 5G direct-conversion transmitter in a 65-nm bulk CMOS technology. The measured image rejection ratio and LO feedthrough suppression ratio are maintained less than −52 dBc and −37 dBc, respectively, in the range of 27.5-29.5 GHz. The TX can support a peak data rate of 4.8 Gb/s at 28.5 GHz using 64-QAM and an error vector magnitude of −27.3 dB.
期刊介绍:
TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:
Circuits: Analog, Digital and Mixed Signal Circuits and Systems
Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
Circuits and Systems, Power Electronics and Systems
Software for Analog-and-Logic Circuits and Systems
Control aspects of Circuits and Systems.