3-D闪存的原始误码率感知极性编码

IF 2.9 3区计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Pub Date : 2025-02-10 DOI:10.1109/TCAD.2025.3540375

Ruifeng Tu;Meng Zhang;Changsheng Xie;Fei Wu

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引用次数: 0

摘要

随着平面和快闪存储器中特征尺寸的不断减小，随机电报噪声（RTN）和单元间静电干扰等可靠性挑战变得越来越严重。为了提高存储容量，三维堆叠技术已成为闪存的首选发展路径。然而，转向3- dand闪存带来了额外的挑战，例如由于更高的集成密度和复杂的垂直干扰，寿命更短，可靠性更低。为了提高3- dand闪存的数据可靠性，提出了一种感知原始误码率（RBER）的极性编码方案RaPC。根据RBER的变化动态调整极化码的纠错能力，纠错误码，保证了可靠性，减少了译码延迟。仿真结果表明，在特定RBER范围内，RaPC在解码延迟和性能方面比传统的低密度奇偶校验（LDPC）码具有显着优势，使其成为提高3- dand闪存可靠性的有希望的解决方案。

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RaPC: Raw Bit Error Rate Aware Polar Coding for 3-D nand Flash Memory

Reliability challenges like random telegraph noise (RTN) and intercell electrostatic interference have gotten worse as feature sizes in planarnand flash memory continue to reduce. In order to improve storage capacity, 3-D stacking ofnand flash memory has emerged as the preferred development path. However, additional challenges are brought about by the switch to 3-Dnand flash, such as shorter lifespans and lower reliability as a result of higher integration densities and intricate vertical interference. This article proposes RaPC: a raw bit error rate (RBER) aware polar coding scheme for improving data reliability of 3-Dnand flash memory. According to the variation of the RBER, the error correction ability of the polar code is dynamically adjusted to correct bit errors, which ensures the reliability and reduces the decoding delay. Simulation results demonstrate that RaPC offers significant advantages in decoding latency and performance over conventional low-density parity-check (LDPC) codes within specific RBER ranges, making it a promising solution for enhancing the reliability of 3-Dnand flash memory.

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来源期刊

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 工程技术-工程：电子与电气

CiteScore

5.60

自引率

13.80%

发文量

500

审稿时长

7 months

期刊介绍： The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.