{"title":"一种266-nW、4.9 μ vrms噪声、可折叠电流复用的宽带神经记录放大器","authors":"Minjae Kim;Jeongho Choi;Joongyu Kim;Sung-Yun Park","doi":"10.1109/LSENS.2025.3594060","DOIUrl":null,"url":null,"abstract":"This letter presents a nano-watt, low-noise, ac-coupled wideband neural recording amplifier. The nano-watt power consumption has been achieved with 1) doubling of the transconductance by using folding current transistors in a folded-cascode operational transconductance amplifier (OTA) as input transistors [folding-current-reuse (FCR) technique], that also nulls their contribution to output noise and 2) dual supplies where the high and low voltages are assigned for low and high current consuming branches, respectively. Also, the proposed FCR technique indirectly contributes to low power consumption by forming low impedance nodes, which is a difference from a conventional current-reuse OTA in a two-stage amplifier that requires Miller compensation. The amplifier with the FCR technique has been fabricated in a 180 nm standard 1P6M complementary metal-oxide-semiconductor (CMOS) process. The fabricated chip has been experimentally verified both in benchtop and in vitro using a commercial silicon microelectrode. The amplifier consumes extremely low power of 266 nW from 0.4 and 0.6 V supplies, with the input referred noise of 4.9 μV<sub>rms</sub> in a wide bandwidth from 0.09 Hz to 7.56 kHz and exhibits 1% total harmonic distortion with an 2.4 mV<sub>pp</sub> input and an 40 dB closed-loop gain.","PeriodicalId":13014,"journal":{"name":"IEEE Sensors Letters","volume":"9 9","pages":"1-4"},"PeriodicalIF":2.2000,"publicationDate":"2025-07-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A 266-nW, 4.9-μVrms Noise, Wideband Neural Recording Amplifier With Folding-Current-Reuse Operational Transconductance Amplifier\",\"authors\":\"Minjae Kim;Jeongho Choi;Joongyu Kim;Sung-Yun Park\",\"doi\":\"10.1109/LSENS.2025.3594060\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This letter presents a nano-watt, low-noise, ac-coupled wideband neural recording amplifier. The nano-watt power consumption has been achieved with 1) doubling of the transconductance by using folding current transistors in a folded-cascode operational transconductance amplifier (OTA) as input transistors [folding-current-reuse (FCR) technique], that also nulls their contribution to output noise and 2) dual supplies where the high and low voltages are assigned for low and high current consuming branches, respectively. Also, the proposed FCR technique indirectly contributes to low power consumption by forming low impedance nodes, which is a difference from a conventional current-reuse OTA in a two-stage amplifier that requires Miller compensation. The amplifier with the FCR technique has been fabricated in a 180 nm standard 1P6M complementary metal-oxide-semiconductor (CMOS) process. The fabricated chip has been experimentally verified both in benchtop and in vitro using a commercial silicon microelectrode. The amplifier consumes extremely low power of 266 nW from 0.4 and 0.6 V supplies, with the input referred noise of 4.9 μV<sub>rms</sub> in a wide bandwidth from 0.09 Hz to 7.56 kHz and exhibits 1% total harmonic distortion with an 2.4 mV<sub>pp</sub> input and an 40 dB closed-loop gain.\",\"PeriodicalId\":13014,\"journal\":{\"name\":\"IEEE Sensors Letters\",\"volume\":\"9 9\",\"pages\":\"1-4\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2025-07-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Sensors Letters\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11105423/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Sensors Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11105423/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A 266-nW, 4.9-μVrms Noise, Wideband Neural Recording Amplifier With Folding-Current-Reuse Operational Transconductance Amplifier
This letter presents a nano-watt, low-noise, ac-coupled wideband neural recording amplifier. The nano-watt power consumption has been achieved with 1) doubling of the transconductance by using folding current transistors in a folded-cascode operational transconductance amplifier (OTA) as input transistors [folding-current-reuse (FCR) technique], that also nulls their contribution to output noise and 2) dual supplies where the high and low voltages are assigned for low and high current consuming branches, respectively. Also, the proposed FCR technique indirectly contributes to low power consumption by forming low impedance nodes, which is a difference from a conventional current-reuse OTA in a two-stage amplifier that requires Miller compensation. The amplifier with the FCR technique has been fabricated in a 180 nm standard 1P6M complementary metal-oxide-semiconductor (CMOS) process. The fabricated chip has been experimentally verified both in benchtop and in vitro using a commercial silicon microelectrode. The amplifier consumes extremely low power of 266 nW from 0.4 and 0.6 V supplies, with the input referred noise of 4.9 μVrms in a wide bandwidth from 0.09 Hz to 7.56 kHz and exhibits 1% total harmonic distortion with an 2.4 mVpp input and an 40 dB closed-loop gain.