{"title":"具有低噪声和自动增益控制放大器的闭环神经记录模拟前端","authors":"Mohammadamin Mohtashamnia, Mohammad Yavari","doi":"10.1016/j.aeue.2025.155976","DOIUrl":null,"url":null,"abstract":"<div><div>This paper presents a novel analog front-end including both an analog circuit and an analog-to-digital converter (ADC) for closed-loop neural recording. The analog part contains a low-noise amplifier (LNA), an automatic gain control amplifier (AGCA), and a voltage buffer. For noise and power performance optimization, a novel LNA structure is introduced. The proposed LNA employs two current mirror amplifiers, both incorporating class-AB output stages. Additionally, the first stage utilizes source-degenerated current mirrors. Using the AGCA allows for dynamic adjustment of the voltage gain during periods without artifacts, which reduces the precision requirements of the ADC. This improves overall system efficiency by optimizing signal amplification while minimizing the ADC’s workload. A 10-bit successive approximation register (SAR) ADC is incorporated to digitize the amplified signals. To judge the operation of the suggested circuit, extensive circuit level simulations were conducted using 180 nm TSMC CMOS technology within the Cadence environment. The circuit operates from a 1.8 V power supply and at 37 °C, consuming 9 μW of power while processing signals with a 10 kHz bandwidth. It reaches a dynamic range of 81.83 dB and a maximum signal-to-noise and distortion ratio (SNDR) of 58.40 dB, demonstrating competitive performance when compared to existing solutions in the field.</div></div>","PeriodicalId":50844,"journal":{"name":"Aeu-International Journal of Electronics and Communications","volume":"201 ","pages":"Article 155976"},"PeriodicalIF":3.2000,"publicationDate":"2025-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A closed-loop neural recording analog front-end with low noise and automatic gain control amplifiers\",\"authors\":\"Mohammadamin Mohtashamnia, Mohammad Yavari\",\"doi\":\"10.1016/j.aeue.2025.155976\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>This paper presents a novel analog front-end including both an analog circuit and an analog-to-digital converter (ADC) for closed-loop neural recording. The analog part contains a low-noise amplifier (LNA), an automatic gain control amplifier (AGCA), and a voltage buffer. For noise and power performance optimization, a novel LNA structure is introduced. The proposed LNA employs two current mirror amplifiers, both incorporating class-AB output stages. Additionally, the first stage utilizes source-degenerated current mirrors. Using the AGCA allows for dynamic adjustment of the voltage gain during periods without artifacts, which reduces the precision requirements of the ADC. This improves overall system efficiency by optimizing signal amplification while minimizing the ADC’s workload. A 10-bit successive approximation register (SAR) ADC is incorporated to digitize the amplified signals. To judge the operation of the suggested circuit, extensive circuit level simulations were conducted using 180 nm TSMC CMOS technology within the Cadence environment. The circuit operates from a 1.8 V power supply and at 37 °C, consuming 9 μW of power while processing signals with a 10 kHz bandwidth. It reaches a dynamic range of 81.83 dB and a maximum signal-to-noise and distortion ratio (SNDR) of 58.40 dB, demonstrating competitive performance when compared to existing solutions in the field.</div></div>\",\"PeriodicalId\":50844,\"journal\":{\"name\":\"Aeu-International Journal of Electronics and Communications\",\"volume\":\"201 \",\"pages\":\"Article 155976\"},\"PeriodicalIF\":3.2000,\"publicationDate\":\"2025-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Aeu-International Journal of Electronics and Communications\",\"FirstCategoryId\":\"94\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1434841125003176\",\"RegionNum\":3,\"RegionCategory\":\"计算机科学\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Aeu-International Journal of Electronics and Communications","FirstCategoryId":"94","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1434841125003176","RegionNum":3,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A closed-loop neural recording analog front-end with low noise and automatic gain control amplifiers
This paper presents a novel analog front-end including both an analog circuit and an analog-to-digital converter (ADC) for closed-loop neural recording. The analog part contains a low-noise amplifier (LNA), an automatic gain control amplifier (AGCA), and a voltage buffer. For noise and power performance optimization, a novel LNA structure is introduced. The proposed LNA employs two current mirror amplifiers, both incorporating class-AB output stages. Additionally, the first stage utilizes source-degenerated current mirrors. Using the AGCA allows for dynamic adjustment of the voltage gain during periods without artifacts, which reduces the precision requirements of the ADC. This improves overall system efficiency by optimizing signal amplification while minimizing the ADC’s workload. A 10-bit successive approximation register (SAR) ADC is incorporated to digitize the amplified signals. To judge the operation of the suggested circuit, extensive circuit level simulations were conducted using 180 nm TSMC CMOS technology within the Cadence environment. The circuit operates from a 1.8 V power supply and at 37 °C, consuming 9 μW of power while processing signals with a 10 kHz bandwidth. It reaches a dynamic range of 81.83 dB and a maximum signal-to-noise and distortion ratio (SNDR) of 58.40 dB, demonstrating competitive performance when compared to existing solutions in the field.
期刊介绍:
AEÜ is an international scientific journal which publishes both original works and invited tutorials. The journal''s scope covers all aspects of theory and design of circuits, systems and devices for electronics, signal processing, and communication, including:
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