{"title":"Si/SiGe超晶格双栅反馈场效应晶体管及其在1T-DRAM中的应用","authors":"Subir Das, Ashraf Maniyar, Pushp Raj, Jawar Singh, Pramod Kumar Tiwari","doi":"10.1016/j.mejo.2025.106822","DOIUrl":null,"url":null,"abstract":"<div><div>This work presents the design and performance analysis of a Si/SiGe superlattice-based double gate feedback field-effect transistor (SL DGFBFET). The proposed SL DGFBFET is designed successively by stacking 3 nm thin Si and Si<span><math><msub><mrow></mrow><mrow><mn>1</mn><mo>−</mo><mi>x</mi></mrow></msub></math></span> <span><math><mrow><mi>G</mi><msub><mrow><mi>e</mi></mrow><mrow><mi>x</mi></mrow></msub></mrow></math></span> layers to achieve a higher ON current, extremely steeper switching characteristics, and a larger memory window than Si-based DGFBFET. The device offers 19 times higher ON current (2.24 × 10<sup>−3</sup> A/<span><math><mi>μ</mi></math></span>m), 10.36 times higher <span><math><mrow><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub><mo>/</mo><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>F</mi><mi>F</mi></mrow></msub></mrow></math></span> ratio (<span><math><mo>∼</mo></math></span> 7.44 × 10<sup>9</sup>), a large memory window of 1.7 V, and an extremely lower subthreshold swing (<span><math><mo>∼</mo></math></span> 0.3 <span><math><mi>μ</mi></math></span>V/decade) than a Si-based FBFET of similar dimensions with a molar fraction x = 0.4, which can be very useful for memory and neuromorphic applications. The device’s OFF-to-ON switching is achieved at a lower gate voltage (threshold voltage = 0.34 V), making it suitable for low-power electronic devices. We have also shown the proposed device application in 1T DRAM which shows a remarkable performance in retention time (<span><math><mo>∼</mo></math></span> 1000 s) and energy consumption (2.37 fJ/bit). The Synopsys TCAD tool has been utilized in the study to design the device structure and analyze its electrical performance.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"165 ","pages":"Article 106822"},"PeriodicalIF":1.9000,"publicationDate":"2025-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Si/SiGe superlattice-based double gate feedback field-effect transistor and its application in 1T-DRAM\",\"authors\":\"Subir Das, Ashraf Maniyar, Pushp Raj, Jawar Singh, Pramod Kumar Tiwari\",\"doi\":\"10.1016/j.mejo.2025.106822\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>This work presents the design and performance analysis of a Si/SiGe superlattice-based double gate feedback field-effect transistor (SL DGFBFET). The proposed SL DGFBFET is designed successively by stacking 3 nm thin Si and Si<span><math><msub><mrow></mrow><mrow><mn>1</mn><mo>−</mo><mi>x</mi></mrow></msub></math></span> <span><math><mrow><mi>G</mi><msub><mrow><mi>e</mi></mrow><mrow><mi>x</mi></mrow></msub></mrow></math></span> layers to achieve a higher ON current, extremely steeper switching characteristics, and a larger memory window than Si-based DGFBFET. The device offers 19 times higher ON current (2.24 × 10<sup>−3</sup> A/<span><math><mi>μ</mi></math></span>m), 10.36 times higher <span><math><mrow><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>N</mi></mrow></msub><mo>/</mo><msub><mrow><mi>I</mi></mrow><mrow><mi>O</mi><mi>F</mi><mi>F</mi></mrow></msub></mrow></math></span> ratio (<span><math><mo>∼</mo></math></span> 7.44 × 10<sup>9</sup>), a large memory window of 1.7 V, and an extremely lower subthreshold swing (<span><math><mo>∼</mo></math></span> 0.3 <span><math><mi>μ</mi></math></span>V/decade) than a Si-based FBFET of similar dimensions with a molar fraction x = 0.4, which can be very useful for memory and neuromorphic applications. The device’s OFF-to-ON switching is achieved at a lower gate voltage (threshold voltage = 0.34 V), making it suitable for low-power electronic devices. We have also shown the proposed device application in 1T DRAM which shows a remarkable performance in retention time (<span><math><mo>∼</mo></math></span> 1000 s) and energy consumption (2.37 fJ/bit). The Synopsys TCAD tool has been utilized in the study to design the device structure and analyze its electrical performance.</div></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":\"165 \",\"pages\":\"Article 106822\"},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2025-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239125002711\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125002711","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Si/SiGe superlattice-based double gate feedback field-effect transistor and its application in 1T-DRAM
This work presents the design and performance analysis of a Si/SiGe superlattice-based double gate feedback field-effect transistor (SL DGFBFET). The proposed SL DGFBFET is designed successively by stacking 3 nm thin Si and Si layers to achieve a higher ON current, extremely steeper switching characteristics, and a larger memory window than Si-based DGFBFET. The device offers 19 times higher ON current (2.24 × 10−3 A/m), 10.36 times higher ratio ( 7.44 × 109), a large memory window of 1.7 V, and an extremely lower subthreshold swing ( 0.3 V/decade) than a Si-based FBFET of similar dimensions with a molar fraction x = 0.4, which can be very useful for memory and neuromorphic applications. The device’s OFF-to-ON switching is achieved at a lower gate voltage (threshold voltage = 0.34 V), making it suitable for low-power electronic devices. We have also shown the proposed device application in 1T DRAM which shows a remarkable performance in retention time ( 1000 s) and energy consumption (2.37 fJ/bit). The Synopsys TCAD tool has been utilized in the study to design the device structure and analyze its electrical performance.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.