一种采用阻抗倍增补偿的超低功耗三级放大器,适用于nf范围的容性负载

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Mingqi Sun, Fanghui Yin, Xian Tang
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引用次数: 0

摘要

为了稳定驱动nf范围容性负载的三级放大器,提出了阻抗倍增补偿(IMC)技术。在该补偿方法中,在第一级的输出端放置一个串联的RC阻抗,产生一个低频左半平面(LHP)零,从而减小了补偿电容的值,并且只消耗少量的静态电流。它消除了第一级和第三级输出之间的桥接米勒电容器,从而防止了复杂极点的产生,提高了增益带宽(GBW)产品。所提出的IMC放大器采用标准的180 nm CMOS技术实现,核心面积为0.0027 mm2。布局后仿真结果表明,在容性负载为15 nF时,最坏情况下电路增益超过100 dB,增益带宽积为0.901 MHz,而静态电流仅消耗13.06 μA。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An ultra-low-power three-stage amplifier using impedance multiplication compensation for nF-range capacitive loads
An impedance multiplication compensation (IMC) technology is presented to stabilize the three-stage amplifier driving nF-range capacitive loads. In the proposed compensation method, a serial multiplied RC impedance is located at output of the first stage to generate a low-frequency (LF) left-half-plane (LHP) zero, which reduces the value of the compensation capacitor and consumes only a small amount of quiescent current. It eliminates the bridge-connecting Miller capacitor between the outputs of the first and third stage, thereby preventing the generation of complex poles and improving the gain-bandwidth (GBW) product. The proposed IMC amplifier is implemented in a standard 180 nm CMOS technology with a core area of 0.0027 mm2. Post-layout simulation results demonstrate that, in the worst case, the circuit achieves a gain exceeding 100 dB and a gain-bandwidth product of 0.901 MHz with a capacitive load of 15 nF, while consuming only 13.06 μA of quiescent current.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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