基于增量和随机转换技术的命令驱动SAR ADC

IF 1.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Kefan Qin , Xinyue Zheng , Jianwei Zhao , Shangzheng Yang , Wei Ma , Weibo Hu
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引用次数: 0

摘要

本文提出了一种命令驱动的16位500 k /s逐次逼近模拟数字转换器(SAR ADC),以支持精确的实时数据采集。所提出的ADC在接收到来自主机的命令后开始转换,从而实现精确的数据采集和故障诊断。该ADC由三部分组成,第一子ADC、剩余放大器(RA)和第二子ADC。第一子adc将电容式数模转换器(CDAC)分解为增量CDAC和二进制CDAC。采用增量式随机转换技术解决冗余切换问题,优化线性度和动态性能。该技术计算需要翻转的有效电容数,然后根据结果使用伪随机序列进行随机翻转。该设计采用180纳米CMOS技术实现。测量结果表明,在500 kS/s的采样速率下,该ADC的信噪比为89.5 dB,信噪比为88.4 dB, THD为- 99.1 dB。测量的积分非线性(INL)和微分非线性(DNL)分别为- 0.28/+0.49 LSB和- 1.95/+1.8 LSB。原型机的功耗为6.2兆瓦,占地面积为0.9平方毫米。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A command-driven SAR ADC with incremental and random converting technique
A command-driven 16-bit 500 kS/s successive approximation analog to digital converter (SAR ADC) is proposed to support accurate real-time data acquisition in this paper. The proposed ADC starts conversion upon receiving commands from the master, thereby enabling precise data acquisition and fault diagnosis. The ADC consists of three parts, the 1st sub-ADC, the residue amplifier (RA), and the 2nd sub-ADC. The 1st sub-ADC decomposes its capacitive digital-to-analog converter (CDAC) into incremental CDAC and binary CDAC. An incremental random converting technique is implemented in the 1st-CDAC to optimize the linearity and dynamic performance by solving the redundant switching. This technique calculates the effective number of capacitors that need to be flipped, and then uses pseudo-random sequence to flip randomly according to the result. The design is implemented with a 180-nm CMOS technology. Measurement results show that the ADC achieves SNR of 89.5 dB, SNDR of 88.4 dB, and THD of −99.1 dB at a sampling rate of 500 kS/s. The measured integral nonlinearity (INL) and differential nonlinearity (DNL) are −0.28/+0.49 LSB and −1.95/+1.8 LSB, respectively. The prototype consumes 6.2 mW and occupies 0.9 mm2.
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来源期刊
Microelectronics Journal
Microelectronics Journal 工程技术-工程:电子与电气
CiteScore
4.00
自引率
27.30%
发文量
222
审稿时长
43 days
期刊介绍: Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems. The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc. Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.
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