sub -0.21 v超低电源电压模数转换器研究进展

IF 2.4 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Eric Christie;Jared Marchant;Shea Smith;Long Kong;Chia-Hung Chen;Shiuh-Hua Wood Chiang
{"title":"sub -0.21 v超低电源电压模数转换器研究进展","authors":"Eric Christie;Jared Marchant;Shea Smith;Long Kong;Chia-Hung Chen;Shiuh-Hua Wood Chiang","doi":"10.1109/OJCAS.2025.3574336","DOIUrl":null,"url":null,"abstract":"Ultra-low-supply-voltage (ULV) analog-to-digital converters (ADCs) operating at 0.21 V or lower are attractive for Internet-of-Things (IoT) and embedded applications due to their extremely low power consumption. This paper surveys state-of-the-art ULV ADCs to evaluate current trends and design strategies. Architectures, circuit implementations, and calibration techniques are analyzed and key trends are identified. Based on the observations, the paper provides recommendations for the circuit designer to make judicious design choices to obtain the desired performance for ULV ADCs. This paper further explores the VCO-based architecture and proposes a new topology to achieve high resolution for ULV ADCs.","PeriodicalId":93442,"journal":{"name":"IEEE open journal of circuits and systems","volume":"6 ","pages":"228-240"},"PeriodicalIF":2.4000,"publicationDate":"2025-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11106915","citationCount":"0","resultStr":"{\"title\":\"A Review on Sub-0.21-V Ultra-Low-Supply-Voltage Analog-to-Digital Converters\",\"authors\":\"Eric Christie;Jared Marchant;Shea Smith;Long Kong;Chia-Hung Chen;Shiuh-Hua Wood Chiang\",\"doi\":\"10.1109/OJCAS.2025.3574336\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Ultra-low-supply-voltage (ULV) analog-to-digital converters (ADCs) operating at 0.21 V or lower are attractive for Internet-of-Things (IoT) and embedded applications due to their extremely low power consumption. This paper surveys state-of-the-art ULV ADCs to evaluate current trends and design strategies. Architectures, circuit implementations, and calibration techniques are analyzed and key trends are identified. Based on the observations, the paper provides recommendations for the circuit designer to make judicious design choices to obtain the desired performance for ULV ADCs. This paper further explores the VCO-based architecture and proposes a new topology to achieve high resolution for ULV ADCs.\",\"PeriodicalId\":93442,\"journal\":{\"name\":\"IEEE open journal of circuits and systems\",\"volume\":\"6 \",\"pages\":\"228-240\"},\"PeriodicalIF\":2.4000,\"publicationDate\":\"2025-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=11106915\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE open journal of circuits and systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11106915/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE open journal of circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11106915/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

工作在0.21 V或更低电压的超低电源电压(ULV)模数转换器(adc)由于其极低的功耗,对于物联网(IoT)和嵌入式应用具有吸引力。本文调查了最先进的超低电压adc,以评估当前的趋势和设计策略。分析了体系结构、电路实现和校准技术,并确定了关键趋势。在此基础上,本文为电路设计者提供了明智的设计选择,以获得理想的ULV adc性能的建议。本文进一步探讨了基于vco的结构,并提出了一种新的拓扑结构来实现ULV adc的高分辨率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Review on Sub-0.21-V Ultra-Low-Supply-Voltage Analog-to-Digital Converters
Ultra-low-supply-voltage (ULV) analog-to-digital converters (ADCs) operating at 0.21 V or lower are attractive for Internet-of-Things (IoT) and embedded applications due to their extremely low power consumption. This paper surveys state-of-the-art ULV ADCs to evaluate current trends and design strategies. Architectures, circuit implementations, and calibration techniques are analyzed and key trends are identified. Based on the observations, the paper provides recommendations for the circuit designer to make judicious design choices to obtain the desired performance for ULV ADCs. This paper further explores the VCO-based architecture and proposes a new topology to achieve high resolution for ULV ADCs.
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