{"title":"设计低损耗单电感多i /O (SL-MI/O) CMOS电源","authors":"Linyuan Cui;Gabriel A. Rincón-Mora","doi":"10.1109/TCSI.2025.3546231","DOIUrl":null,"url":null,"abstract":"Switched-inductor power supplies are valued for their high efficiency despite the bulkiness of off-chip inductors. When designing compact systems like portable consumer electronics and wireless microsensors, single-inductor topologies are therefore preferred. Specifically, single-inductor multi-input and multi-output (SL-MI/O) power supply designs pose unique challenges that have yet to be fully addressed. This paper aims to provide design guidelines for maximizing efficiency in the design of SL-MI/O systems, especially in the sub-5W domain. To simplify the choice between NFETs and PFETs for the multitude of power switches in SL-MI/Os, which is not straightforward, an intuitive metric called the Favorability Index (F<inline-formula> <tex-math>${}_{\\mathrm {NP}}$ </tex-math></inline-formula>) is proposed. A new, optimal supply voltage theory is also presented, suggesting that the most efficient voltage to supply power switches’ gates is around twice the threshold voltage (v<inline-formula> <tex-math>${}_{\\mathrm {T}}$ </tex-math></inline-formula>). The paper also proposes using dynamic selectors in gate drivers. This allows for blocking cross conduction without increasing vSUP drastically, ensuring efficiency. A two-transistor selector is recommended as a simple implementation, and the tradeoffs are discussed. An example topology is designed using guidelines proposed by the paper to demonstrate the design flow and efficiency improvements.","PeriodicalId":13039,"journal":{"name":"IEEE Transactions on Circuits and Systems I: Regular Papers","volume":"72 8","pages":"3766-3776"},"PeriodicalIF":5.2000,"publicationDate":"2025-04-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Designing Low-Loss Single-Inductor Multiple-I/O (SL-MI/O) CMOS Power Supplies\",\"authors\":\"Linyuan Cui;Gabriel A. Rincón-Mora\",\"doi\":\"10.1109/TCSI.2025.3546231\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Switched-inductor power supplies are valued for their high efficiency despite the bulkiness of off-chip inductors. When designing compact systems like portable consumer electronics and wireless microsensors, single-inductor topologies are therefore preferred. Specifically, single-inductor multi-input and multi-output (SL-MI/O) power supply designs pose unique challenges that have yet to be fully addressed. This paper aims to provide design guidelines for maximizing efficiency in the design of SL-MI/O systems, especially in the sub-5W domain. To simplify the choice between NFETs and PFETs for the multitude of power switches in SL-MI/Os, which is not straightforward, an intuitive metric called the Favorability Index (F<inline-formula> <tex-math>${}_{\\\\mathrm {NP}}$ </tex-math></inline-formula>) is proposed. A new, optimal supply voltage theory is also presented, suggesting that the most efficient voltage to supply power switches’ gates is around twice the threshold voltage (v<inline-formula> <tex-math>${}_{\\\\mathrm {T}}$ </tex-math></inline-formula>). The paper also proposes using dynamic selectors in gate drivers. This allows for blocking cross conduction without increasing vSUP drastically, ensuring efficiency. A two-transistor selector is recommended as a simple implementation, and the tradeoffs are discussed. An example topology is designed using guidelines proposed by the paper to demonstrate the design flow and efficiency improvements.\",\"PeriodicalId\":13039,\"journal\":{\"name\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"volume\":\"72 8\",\"pages\":\"3766-3776\"},\"PeriodicalIF\":5.2000,\"publicationDate\":\"2025-04-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Circuits and Systems I: Regular Papers\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10964411/\",\"RegionNum\":1,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Circuits and Systems I: Regular Papers","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10964411/","RegionNum":1,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Designing Low-Loss Single-Inductor Multiple-I/O (SL-MI/O) CMOS Power Supplies
Switched-inductor power supplies are valued for their high efficiency despite the bulkiness of off-chip inductors. When designing compact systems like portable consumer electronics and wireless microsensors, single-inductor topologies are therefore preferred. Specifically, single-inductor multi-input and multi-output (SL-MI/O) power supply designs pose unique challenges that have yet to be fully addressed. This paper aims to provide design guidelines for maximizing efficiency in the design of SL-MI/O systems, especially in the sub-5W domain. To simplify the choice between NFETs and PFETs for the multitude of power switches in SL-MI/Os, which is not straightforward, an intuitive metric called the Favorability Index (F${}_{\mathrm {NP}}$ ) is proposed. A new, optimal supply voltage theory is also presented, suggesting that the most efficient voltage to supply power switches’ gates is around twice the threshold voltage (v${}_{\mathrm {T}}$ ). The paper also proposes using dynamic selectors in gate drivers. This allows for blocking cross conduction without increasing vSUP drastically, ensuring efficiency. A two-transistor selector is recommended as a simple implementation, and the tradeoffs are discussed. An example topology is designed using guidelines proposed by the paper to demonstrate the design flow and efficiency improvements.
期刊介绍:
TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.