跨阻抗与BW解耦的多级RC补偿技术:实现高速低噪声TIA设计

IF 5.2 1区 工程技术 Q1 ENGINEERING, ELECTRICAL & ELECTRONIC
Muhammad Bilal Babar;Gordon W. Roberts
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引用次数: 0

摘要

并联反馈跨阻放大器(TIA)的增益和带宽受到所谓的跨阻(TI)限制。这个限制规定了目标带宽下反馈电阻($R_{F}$)的最大可能值。此外,此类tia的输入参考噪声与R_{F}$成反比,这对同时优化带宽、噪声和跨阻增益提出了挑战。本文重新研究了TI极限,提出了一种多级RC补偿技术,用于设计闭环并联反馈TI级的开环放大器。本文表明,通过适当的极零定位,直流跨阻增益可以与闭环TI带宽解耦。这是通过在开环传递函数中放置一个零来实现的,以减少由输入电容和射频产生的闭环主导极的影响。因此,在不需要面积消耗电感的情况下,实现的TI级具有比传统假设的限制更大的通阻限制。此外,所提出的RC补偿网络提供了对极零定位的更多控制,从而使均衡后的整体频率响应平滑。实验结果证实了这一点,实验结果表明,与传统极限相比,所提出的技术实现了更大的跨阻增益,同时降低了噪声,并且没有任何显着的带宽恶化。该设计已在Global Foundries (GF-9HP)的90纳米BiCMOS工艺中实现。并与其他TIA设计作了详细的比较。据作者所知,所提出的设计在噪声-通阻-带宽权衡方面优于最先进的TIA设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Multi-Stage RC Compensation Technique for Decoupling the Transimpedance and BW: Creating High Speed and Low Noise TIA Designs
The gain and bandwidth of a shunt-feedback Transimpedance Amplifier (TIA) is limited by a so called transimpedance (TI) limit. This limit dictates the maximum possible value of the feedback resistance ( $R_{F}$ ) for a targeted bandwidth. Additionally, the input referred noise of such TIAs is inversely proportional to the $R_{F}$ , which presents a challenge in simultaneous optimization of bandwidth, noise and transimpedance gain. In this paper, the TI limit is revisited, and a multi-stage RC compensation technique is presented for the design of the open-loop amplifier for a closed-loop shunt-feedback-based TI stage. This paper shows that with the appropriate pole-zero positioning, the DC transimpedance gain can be decoupled from the closed-loop TI bandwidth. This is achieved by placing a zero in the open loop transfer function to reduce the impact of the closed loop dominant pole created by the input capacitance and the RF. As a result, without the need for area consuming inductors, a TI stage is realized which has a transimpedance limit that is larger than the conventionally assumed limit. Additionally, the proposed RC compensation network provides more control over the pole-zero positioning which results in smooth overall frequency response after equalization. This is verified by experimental results which show that the proposed technique achieves a much greater transimpedance gain as compared to that of the conventional limit while reducing the noise and without any significant deterioration of bandwidth. The design has been implemented in a 90 nm BiCMOS process from Global Foundries (GF-9HP). A detailed comparison of the proposed approach is presented with other TIA designs. As per the author’s best knowledge, the proposed design outperforms the state-of-the-art TIA designs in terms of the noise-transimpedance-bandwidth trade-off.
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来源期刊
IEEE Transactions on Circuits and Systems I: Regular Papers
IEEE Transactions on Circuits and Systems I: Regular Papers 工程技术-工程:电子与电气
CiteScore
9.80
自引率
11.80%
发文量
441
审稿时长
2 months
期刊介绍: TCAS I publishes regular papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes: - Circuits: Analog, Digital and Mixed Signal Circuits and Systems - Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic - Circuits and Systems, Power Electronics and Systems - Software for Analog-and-Logic Circuits and Systems - Control aspects of Circuits and Systems.
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