{"title":"基于周期一致生成对抗网络的鲁棒模拟/射频电路设计","authors":"Nanlin Guo , Jun Tao , Xuan Zeng , Xin Li","doi":"10.1016/j.vlsi.2025.102488","DOIUrl":null,"url":null,"abstract":"<div><div>In this paper, we propose a novel method based on Cycle-Consistent Generative Adversarial Networks (Cycle-GAN) to efficiently synthesize robust analog/RF circuits. The key idea is to learn a mathematical mapping between nominal and robust designs by using a Cycle-GAN, which can be used to convert a given nominal design to its robust version with great computational efficiency. The proposed Cycle-GAN is learned from a large number of nominal designs synthesized by EDA tools and a small number of robust circuits manually designed by human experts. Hence, it is expected to appropriately incorporate the human design knowledge that is often difficult to capture by other state-of-the-art methods. Two circuit examples demonstrate that the proposed approach can accurately synthesize robust analog/RF circuits with low computational cost.</div></div>","PeriodicalId":54973,"journal":{"name":"Integration-The Vlsi Journal","volume":"105 ","pages":"Article 102488"},"PeriodicalIF":2.5000,"publicationDate":"2025-07-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Robust analog/RF circuit design via Cycle-Consistent Generative Adversarial Networks\",\"authors\":\"Nanlin Guo , Jun Tao , Xuan Zeng , Xin Li\",\"doi\":\"10.1016/j.vlsi.2025.102488\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>In this paper, we propose a novel method based on Cycle-Consistent Generative Adversarial Networks (Cycle-GAN) to efficiently synthesize robust analog/RF circuits. The key idea is to learn a mathematical mapping between nominal and robust designs by using a Cycle-GAN, which can be used to convert a given nominal design to its robust version with great computational efficiency. The proposed Cycle-GAN is learned from a large number of nominal designs synthesized by EDA tools and a small number of robust circuits manually designed by human experts. Hence, it is expected to appropriately incorporate the human design knowledge that is often difficult to capture by other state-of-the-art methods. Two circuit examples demonstrate that the proposed approach can accurately synthesize robust analog/RF circuits with low computational cost.</div></div>\",\"PeriodicalId\":54973,\"journal\":{\"name\":\"Integration-The Vlsi Journal\",\"volume\":\"105 \",\"pages\":\"Article 102488\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2025-07-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Integration-The Vlsi Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0167926025001452\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Integration-The Vlsi Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0167926025001452","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
Robust analog/RF circuit design via Cycle-Consistent Generative Adversarial Networks
In this paper, we propose a novel method based on Cycle-Consistent Generative Adversarial Networks (Cycle-GAN) to efficiently synthesize robust analog/RF circuits. The key idea is to learn a mathematical mapping between nominal and robust designs by using a Cycle-GAN, which can be used to convert a given nominal design to its robust version with great computational efficiency. The proposed Cycle-GAN is learned from a large number of nominal designs synthesized by EDA tools and a small number of robust circuits manually designed by human experts. Hence, it is expected to appropriately incorporate the human design knowledge that is often difficult to capture by other state-of-the-art methods. Two circuit examples demonstrate that the proposed approach can accurately synthesize robust analog/RF circuits with low computational cost.
期刊介绍:
Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics:
Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.