基于周期一致生成对抗网络的鲁棒模拟/射频电路设计

IF 2.5 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Nanlin Guo , Jun Tao , Xuan Zeng , Xin Li
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引用次数: 0

摘要

在本文中,我们提出了一种基于周期一致生成对抗网络(Cycle-GAN)的新方法来有效地合成鲁棒模拟/射频电路。关键思想是通过使用循环gan来学习标称设计和鲁棒设计之间的数学映射,它可以用于将给定的标称设计转换为其鲁棒版本,具有很高的计算效率。所提出的循环gan是从EDA工具合成的大量标称设计和少量由人类专家手动设计的鲁棒电路中学习得来的。因此,期望适当地结合人类设计知识,这些知识通常很难被其他最先进的方法捕获。两个电路实例表明,该方法可以准确地合成鲁棒模拟/射频电路,且计算成本低。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Robust analog/RF circuit design via Cycle-Consistent Generative Adversarial Networks
In this paper, we propose a novel method based on Cycle-Consistent Generative Adversarial Networks (Cycle-GAN) to efficiently synthesize robust analog/RF circuits. The key idea is to learn a mathematical mapping between nominal and robust designs by using a Cycle-GAN, which can be used to convert a given nominal design to its robust version with great computational efficiency. The proposed Cycle-GAN is learned from a large number of nominal designs synthesized by EDA tools and a small number of robust circuits manually designed by human experts. Hence, it is expected to appropriately incorporate the human design knowledge that is often difficult to capture by other state-of-the-art methods. Two circuit examples demonstrate that the proposed approach can accurately synthesize robust analog/RF circuits with low computational cost.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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