基于随机信念传播的MIMO系统迭代检测与解码

IF 3.1 2区工程技术 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Very Large Scale Integration (VLSI) Systems Pub Date : 2025-07-02 DOI:10.1109/TVLSI.2024.3477963

Muhao Li;Houren Ji;Xiaosi Tan;Chuan Zhang

{"title":"基于随机信念传播的MIMO系统迭代检测与解码","authors":"Muhao Li;Houren Ji;Xiaosi Tan;Chuan Zhang","doi":"10.1109/TVLSI.2024.3477963","DOIUrl":null,"url":null,"abstract":"In this brief, a stochastic belief propagation (BP)-based iterative detection and decoding (IDD) for multiple-input and multiple-output (MIMO) system is proposed. We modify the algorithm of BP detection to make it more suitable for stochastic computation and enable the soft message to be transmitted between the detector and decoder in the format of stochastic sequences. Through IDD, the required number of iterations and quantization precision for the detector will decrease. By sharing the stochastic number generator, the hardware complexity of both the detector and decoder can be reduced. Hardware architectural optimizations and the corresponding implementation are also given, and we can implement <inline-formula> <tex-math>$64\\times 32$ </tex-math></inline-formula>, four-QAM MIMO system with (128, 64) polar codes with <inline-formula> <tex-math>$1.283~\\text {mm}^{2}$ </tex-math></inline-formula> area consumption. Compared with other detector, the hardware efficiency can be improved by 7.8 times.","PeriodicalId":13425,"journal":{"name":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","volume":"33 8","pages":"2324-2328"},"PeriodicalIF":3.1000,"publicationDate":"2025-07-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Stochastic Belief Propagation-Based Iterative Detection and Decoding for MIMO Systems\",\"authors\":\"Muhao Li;Houren Ji;Xiaosi Tan;Chuan Zhang\",\"doi\":\"10.1109/TVLSI.2024.3477963\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this brief, a stochastic belief propagation (BP)-based iterative detection and decoding (IDD) for multiple-input and multiple-output (MIMO) system is proposed. We modify the algorithm of BP detection to make it more suitable for stochastic computation and enable the soft message to be transmitted between the detector and decoder in the format of stochastic sequences. Through IDD, the required number of iterations and quantization precision for the detector will decrease. By sharing the stochastic number generator, the hardware complexity of both the detector and decoder can be reduced. Hardware architectural optimizations and the corresponding implementation are also given, and we can implement <inline-formula> <tex-math>$64\\\\times 32$ </tex-math></inline-formula>, four-QAM MIMO system with (128, 64) polar codes with <inline-formula> <tex-math>$1.283~\\\\text {mm}^{2}$ </tex-math></inline-formula> area consumption. Compared with other detector, the hardware efficiency can be improved by 7.8 times.\",\"PeriodicalId\":13425,\"journal\":{\"name\":\"IEEE Transactions on Very Large Scale Integration (VLSI) Systems\",\"volume\":\"33 8\",\"pages\":\"2324-2328\"},\"PeriodicalIF\":3.1000,\"publicationDate\":\"2025-07-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Very Large Scale Integration (VLSI) Systems\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/11061365/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11061365/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

摘要

本文提出了一种基于随机信念传播（BP）的多输入多输出（MIMO）系统迭代检测与解码（IDD）方法。我们改进了BP检测算法，使其更适合随机计算，并使软信息以随机序列的形式在检测器和解码器之间传输。通过IDD，探测器所需的迭代次数和量化精度会降低。通过共享随机数生成器，可以降低检测器和解码器的硬件复杂度。硬件架构优化和相应的实现，我们可以实现$64\ × 32$， 4 - qam MIMO系统，（128,64）极码，$1.283~\text {mm}^{2}$面积消耗。与其他检测器相比，硬件效率可提高7.8倍。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Stochastic Belief Propagation-Based Iterative Detection and Decoding for MIMO Systems

In this brief, a stochastic belief propagation (BP)-based iterative detection and decoding (IDD) for multiple-input and multiple-output (MIMO) system is proposed. We modify the algorithm of BP detection to make it more suitable for stochastic computation and enable the soft message to be transmitted between the detector and decoder in the format of stochastic sequences. Through IDD, the required number of iterations and quantization precision for the detector will decrease. By sharing the stochastic number generator, the hardware complexity of both the detector and decoder can be reduced. Hardware architectural optimizations and the corresponding implementation are also given, and we can implement

$64\times 32$

, four-QAM MIMO system with (128, 64) polar codes with

$1.283~\text {mm}^{2}$

area consumption. Compared with other detector, the hardware efficiency can be improved by 7.8 times.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 工程技术-工程：电子与电气

CiteScore

6.40

自引率

7.10%

发文量

187

审稿时长

3.6 months

期刊介绍： The IEEE Transactions on VLSI Systems is published as a monthly journal under the co-sponsorship of the IEEE Circuits and Systems Society, the IEEE Computer Society, and the IEEE Solid-State Circuits Society. Design and realization of microelectronic systems using VLSI/ULSI technologies require close collaboration among scientists and engineers in the fields of systems architecture, logic and circuit design, chips and wafer fabrication, packaging, testing and systems applications. Generation of specifications, design and verification must be performed at all abstraction levels, including the system, register-transfer, logic, circuit, transistor and process levels. To address this critical area through a common forum, the IEEE Transactions on VLSI Systems have been founded. The editorial board, consisting of international experts, invites original papers which emphasize and merit the novel systems integration aspects of microelectronic systems including interactions among systems design and partitioning, logic and memory design, digital and analog circuit design, layout synthesis, CAD tools, chips and wafer fabrication, testing and packaging, and systems level qualification. Thus, the coverage of these Transactions will focus on VLSI/ULSI microelectronic systems integration.