Design of a Pixel-Level Low-Dropout Regulator With Sub-Loop Compensation in Large Matrix Readout ASICs for Space X-Ray Imaging

In energy-resolved X-ray imaging, non-ideal factors impact the application-specific integrated circuits (ASICs) for pixel readout. Integrating a low-dropout (LDO) regulator within the pixel array helps to improve consistency, but the design of pixel-level LDOs faces significant challenges under stringent power, stability, and area constraints. This article proposes a novel pixel-level LDO architecture employing sub-loop (SL) compensation to simultaneously enhance stability and transient response characteristics. The SL structure generates a left-half-plane (LHP) zero to cancel the secondary pole and is driven directly by the first stage of the error amplifier (EA) without requiring additional operational amplifiers. This approach achieves a $3\times $ reduction in compensation capacitance while maintaining a phase margin (PM) exceeding 60° across all load conditions. Furthermore, we introduce for the first time an LDO-based calibration method to mitigate the inter-pixel gain inconsistency caused by supply and ground voltage drops and manufacturing mismatches. A prototype chip has been designed and fabricated using a 130-nm CMOS process. The LDO occupies only $1500~\mu $ m2 of die area while consuming a quiescent current of $26~\mu $ A. When deployed in super-pixel constructions to validate the calibration scheme, the measured standard deviations of gain variation improved from 0.25 (uncorrected) to 0.08 mV/fC (corrected).