Saturn: a chiplet-based optical network architecture for breaking the memory wall

Given the increasingly computing-intensive and data-intensive workloads of high-performance computing applications, the need for more cores and larger storage capacity is expanding. While computational power is rapidly increasing, data movement capability among cores and memory modules has not stepped forward substantially. Low energy efficiency and parallelism of data movement have become a bottleneck. Optical interconnects with better bandwidth and power performance are a promising method. In addition, chiplet technology significantly amplifies the benefits of optical interconnects. However, existing optical networks do not take the modularity and flexible assembly of chiplets into account, nor do they take advantage of new fabrication and packaging. In this paper, we propose Saturn, an optical interconnection network architecture, including two parts: a core-to-memory network (CTMN) and a core-to-core network. In the CTMN, the integration of optical broadband micro-ring technology and co-designed wavelength assignment enables memory access to be completed in a single hop, providing highly parallel bandwidth. The serpentine layout employed in the CTMN eliminates waveguide crossings, which in turn substantially reduces the insertion loss and energy consumption. Analytical simulations have validated the effectiveness and efficiency of Saturn, showing that it can improve memory access throughput performance while achieving energy reduction compared with a traditional network.