{"title":"片上网络的预拥塞感知确定性自适应混合路由(PcaDAHR)算法","authors":"Ning Ji, Yintang Yang","doi":"10.1016/j.mejo.2025.106811","DOIUrl":null,"url":null,"abstract":"<div><div>Nowadays, it is crucial to address the communication challenges associated with multiple-core technology. Network-on-chip (NoC) offers an efficient solution and has emerged as a focal point. Routing algorithms play a critical role in determining the performance metrics of NoCs. In this paper, we propose a novel pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm that combines the adjacent congestion status of the source node with the deterministic routing algorithm to make the final routing decision. The forwarding path is unique and deadlock-free. It will be recorded in the head flit at the packet injection stage, eliminating the need for the routing calculation unit. Simulation results demonstrate that PcaDAHR reduces average packet latency by at least 3.3 % while improving saturation throughput by at least 4.6 % compared to traditional routing schemes without increasing the hardware overhead.</div></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":"164 ","pages":"Article 106811"},"PeriodicalIF":1.9000,"publicationDate":"2025-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm for network-on-chip\",\"authors\":\"Ning Ji, Yintang Yang\",\"doi\":\"10.1016/j.mejo.2025.106811\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Nowadays, it is crucial to address the communication challenges associated with multiple-core technology. Network-on-chip (NoC) offers an efficient solution and has emerged as a focal point. Routing algorithms play a critical role in determining the performance metrics of NoCs. In this paper, we propose a novel pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm that combines the adjacent congestion status of the source node with the deterministic routing algorithm to make the final routing decision. The forwarding path is unique and deadlock-free. It will be recorded in the head flit at the packet injection stage, eliminating the need for the routing calculation unit. Simulation results demonstrate that PcaDAHR reduces average packet latency by at least 3.3 % while improving saturation throughput by at least 4.6 % compared to traditional routing schemes without increasing the hardware overhead.</div></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":\"164 \",\"pages\":\"Article 106811\"},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2025-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239125002607\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239125002607","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
A pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm for network-on-chip
Nowadays, it is crucial to address the communication challenges associated with multiple-core technology. Network-on-chip (NoC) offers an efficient solution and has emerged as a focal point. Routing algorithms play a critical role in determining the performance metrics of NoCs. In this paper, we propose a novel pre-congestion-aware deterministic-adaptive hybrid routing (PcaDAHR) algorithm that combines the adjacent congestion status of the source node with the deterministic routing algorithm to make the final routing decision. The forwarding path is unique and deadlock-free. It will be recorded in the head flit at the packet injection stage, eliminating the need for the routing calculation unit. Simulation results demonstrate that PcaDAHR reduces average packet latency by at least 3.3 % while improving saturation throughput by at least 4.6 % compared to traditional routing schemes without increasing the hardware overhead.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.