多层高速缓存的自适应跨层数据放置方法

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Zhaoyang Zeng;Yujuan Tan;Zhulin Ma;Jiali Li;Sanle Zhao;Duo Liu;Xianzhang Chen;Ao Ren
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引用次数: 0

摘要

多级缓存系统通过从全局角度优化跨不同缓存级别的数据放置来增强I/O性能。然而,由于现有的方法依赖于历史访问模式和不灵活的放置策略,它们常常难以迅速地将数据放置在最佳缓存级别。这些方法面临两个主要挑战:1)对于已经缓存的具有足够访问历史的数据,现有的方法只能优化相邻缓存级别之间的移动,可能会延迟数据到达全局最优缓存级别,并导致不必要的带宽消耗和延迟增加;2)对于没有访问历史的新输入数据,目前的方法无法准确预测其未来的热度,并简单地将其放置在固定的缓存级别(即第一或最终级别)。忽略未来对新数据的访问,可能导致高缓存丢失率或缓存污染。为了解决这些问题,我们提出了CMCache,一种用于多级缓存的自适应跨层数据放置方法。考虑到缓存数据和新数据的不同特性,CMCache对它们采用不同的放置策略,以便及时达到最佳水平。它还在逻辑上将缓存空间划分为两个部分,分别管理缓存数据和新数据,并根据访问模式动态调整部分大小。该方法显著提高了数据放置效率,与现有方法相比,缺失率降低89%,平均响应时间降低79%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CMCache: An Adaptive Cross-Level Data Placement Method for Multilevel Cache
Multilevel cache systems enhance I/O performance by optimizing data placement across various cache levels from a global perspective. However, existing methods often struggle to place data at the optimal cache level promptly due to their reliance on historical access patterns and inflexible placement strategies. These methods face two main challenges: 1) for already cached data with sufficient access history, existing approaches only optimize movement between adjacent cache levels, potentially delaying data arrival at its globally optimal cache level and leading to unnecessary bandwidth consumption and increased latency and 2) for newly entered data without access history, current methods cannot accurately predict their future hotness and simply place them at a fixed cache level (i.e., first or final level), overlooking future accesses of new data and potentially resulting in high cache miss rates or cache pollution. To address these issues, we propose CMCache, an adaptive cross-level data placement method for multilevel cache. CMCache applies distinct placement strategies for cached and new data to reach the optimal level timely, considering their different characteristics. It also logically divides cache space into two sections to manage cached and new data separately, dynamically adjusting section sizes based on access patterns. This approach significantly improves data placement efficiency, achieving up to an 89% reduction in miss rates and a 79% decrease in average response times compared to existing methods.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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