动态映射:CGRA多任务动态资源分配的启发式动态映射器

IF 2.7 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yufei Yang;Chenhao Xie;Liansheng Liu;Xiyuan Peng
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引用次数: 0

摘要

粗粒度可重构架构(CGRA)由于其在性能、能效和灵活性等方面的综合优势,越来越受到业界和学术界的关注。为了提高资源利用率和处理现实生活中的混合工作负载,多个任务共享整个CGRA已成为一个重要的技术趋势,而多个任务在整个生命周期中对资源需求的变化也使得运行时动态资源分配(DRA)成为提高多任务吞吐量的必要条件。动态映射(DM)是DRA的关键阶段,负责将每个任务内的核映射到动态分配的CGRA资源。然而,现有的数据挖掘方法难以平衡映射时间和映射质量,导致实际任务吞吐量与最优任务吞吐量之间存在较大差距。为了解决这一挑战,我们提出了一种启发式动态映射器DynMap,用于CGRA多任务DRA。在专门的调度和路由方案的支持下,动态地图在静态映射结果中启发式地引用放置趋势,从而极大地节省了映射时间,同时通过最小化资源冲突的可能性来保持高映射质量。实验评估表明,DynMap不仅在不同CGRA架构上实现了平均1.17 ms的映射时间和平均98.33%的最优映射质量,而且在不同CGRA多任务DRA场景下实现了平均98.85%的最优任务吞吐量,使实际任务吞吐量与最优任务吞吐量之间的平均差距比现有方法缩小了31.75倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
DynMap: A Heuristic Dynamic Mapper for CGRA Multitask Dynamic Resource Allocation
Coarse-grained reconfigurable architecture (CGRA) has received increasing attention in both industry and academia due to its comprehensive advantages of performance, energy efficiency, and flexibility. To improve the resource utilization and handle the mixing workloads in the real-world, multiple tasks sharing the whole CGRA has became an important technical trend, and the varying resource requirements throughout their life cycles also makes run-time dynamic resource allocation (DRA) necessary for higher-multitask throughput. As the key stage of DRA, dynamic mapping (DM) is responsible for mapping kernels within each task to the dynamically allocated CGRA resources. However, existing DM methods have difficulty to balance the mapping time and the mapping quality, resulting in a significant gap between the actual and the optimal task throughput. To address the challenge, we propose DynMap, a heuristic dynamic mapper for CGRA multitask DRA. With the support of specialized scheduling and routing schemes, DynMap heuristically references the placement tendency in the static mapping result to dramatically save the mapping time, while maintaining the high-mapping quality by minimizing the possibility of resource conflicts. Experimental evaluation demonstrates DynMap not only achieves the average 1.17 ms mapping time and average 98.33% of the optimal mapping quality on different CGRA architectures, but also reaches average 98.85% of the optimal task throughput expected by different CGRA multitask DRA scenarios, reducing the gap between actual and optimal task throughput average $31.75\times $ smaller than that of the current methods.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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