{"title":"硅基有机发光二极管的4032像素/英寸阈值电压补偿像素电路","authors":"Sanghyun Heo, Joon Chul Goh, Taehun Lee, Seungha Baek, Ohjo Kwon, Sangmyeon Han, Jaebeom Choi","doi":"10.1002/jsid.2067","DOIUrl":null,"url":null,"abstract":"<p>Virtual reality (VR) headsets with pancake lenses require organic light-emitting diode-on-silicon (OLEDoS) panels for higher pixel density and superior image quality. Achieving high-quality OLEDoS panels necessitates integrating pixel compensation circuits within the limited pixel area of high-resolution displays. However, reduced transistor count increases Vth variation, while smaller storage capacitors with higher parasitic capacitance degrade image quality. This study proposes a novel 7T1C pixel compensation circuit for 4032-ppi OLEDoS panels operating at 8 V. The circuit minimizes the body effect in CMOS transistors by maintaining equal voltage at the source and body nodes of the driving transistor. An area-efficient single-capacitor design and a data-driving method without toggling mitigate image quality degradation caused by capacitor coupling. The proposed 4032-ppi panel enhances short-range uniformity (SRU) from 90.4% to 97.3% and reduces horizontal cross-talk from 2.0% to 1.3%.</p>","PeriodicalId":49979,"journal":{"name":"Journal of the Society for Information Display","volume":"33 5","pages":"689-697"},"PeriodicalIF":2.2000,"publicationDate":"2025-04-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"4032-pixels per inch threshold voltage compensation pixel circuit for organic light-emitting diode-on-silicon\",\"authors\":\"Sanghyun Heo, Joon Chul Goh, Taehun Lee, Seungha Baek, Ohjo Kwon, Sangmyeon Han, Jaebeom Choi\",\"doi\":\"10.1002/jsid.2067\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>Virtual reality (VR) headsets with pancake lenses require organic light-emitting diode-on-silicon (OLEDoS) panels for higher pixel density and superior image quality. Achieving high-quality OLEDoS panels necessitates integrating pixel compensation circuits within the limited pixel area of high-resolution displays. However, reduced transistor count increases Vth variation, while smaller storage capacitors with higher parasitic capacitance degrade image quality. This study proposes a novel 7T1C pixel compensation circuit for 4032-ppi OLEDoS panels operating at 8 V. The circuit minimizes the body effect in CMOS transistors by maintaining equal voltage at the source and body nodes of the driving transistor. An area-efficient single-capacitor design and a data-driving method without toggling mitigate image quality degradation caused by capacitor coupling. The proposed 4032-ppi panel enhances short-range uniformity (SRU) from 90.4% to 97.3% and reduces horizontal cross-talk from 2.0% to 1.3%.</p>\",\"PeriodicalId\":49979,\"journal\":{\"name\":\"Journal of the Society for Information Display\",\"volume\":\"33 5\",\"pages\":\"689-697\"},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2025-04-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of the Society for Information Display\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://sid.onlinelibrary.wiley.com/doi/10.1002/jsid.2067\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of the Society for Information Display","FirstCategoryId":"5","ListUrlMain":"https://sid.onlinelibrary.wiley.com/doi/10.1002/jsid.2067","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
带有煎饼镜头的虚拟现实(VR)头显需要有机硅上发光二极管(oledo)面板,以获得更高的像素密度和卓越的图像质量。实现高质量的oled面板需要在高分辨率显示器的有限像素区域内集成像素补偿电路。然而,晶体管数量的减少增加了Vth的变化,而更小的存储电容器具有更高的寄生电容会降低图像质量。本研究提出了一种新颖的7T1C像素补偿电路,用于工作在8 V的4032 ppi oled面板。该电路通过在驱动晶体管的源和体节点上保持相等的电压来最小化CMOS晶体管中的体效应。面积高效的单电容设计和无切换的数据驱动方法减轻了由电容耦合引起的图像质量下降。提议的4032-ppi面板将短距离均匀性(SRU)从90.4%提高到97.3%,并将水平串扰从2.0%降低到1.3%。
4032-pixels per inch threshold voltage compensation pixel circuit for organic light-emitting diode-on-silicon
Virtual reality (VR) headsets with pancake lenses require organic light-emitting diode-on-silicon (OLEDoS) panels for higher pixel density and superior image quality. Achieving high-quality OLEDoS panels necessitates integrating pixel compensation circuits within the limited pixel area of high-resolution displays. However, reduced transistor count increases Vth variation, while smaller storage capacitors with higher parasitic capacitance degrade image quality. This study proposes a novel 7T1C pixel compensation circuit for 4032-ppi OLEDoS panels operating at 8 V. The circuit minimizes the body effect in CMOS transistors by maintaining equal voltage at the source and body nodes of the driving transistor. An area-efficient single-capacitor design and a data-driving method without toggling mitigate image quality degradation caused by capacitor coupling. The proposed 4032-ppi panel enhances short-range uniformity (SRU) from 90.4% to 97.3% and reduces horizontal cross-talk from 2.0% to 1.3%.
期刊介绍:
The Journal of the Society for Information Display publishes original works dealing with the theory and practice of information display. Coverage includes materials, devices and systems; the underlying chemistry, physics, physiology and psychology; measurement techniques, manufacturing technologies; and all aspects of the interaction between equipment and its users. Review articles are also published in all of these areas. Occasional special issues or sections consist of collections of papers on specific topical areas or collections of full length papers based in part on oral or poster presentations given at SID sponsored conferences.