考虑不确定性的射频MEMS开关鲁棒优化算法

IF 2.2 3区 工程技术 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Hao Yan , Yaning Jia , Chuangyuan Zeng , Xiaoping Liao , Xiao Shi
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引用次数: 0

摘要

射频MEMS开关的高效稳健设计需要平衡严格的性能标准和固有的不确定性。本文提出了一种综合鲁棒MEMS优化(CRMO)框架,该框架集成了基于筛选约束的代理辅助差分进化(SDESC)和基于粒子群优化(PSO)的全局和局部回归模型的代理辅助多目标最坏情况(SMOW)分析方法。SDESC算法基于可行解的比例自适应调整约束评估,显著降低了计算开销,而SMOW算法能有效处理多目标最坏情况。对35ghz系列开关和10ghz并联开关的实验评估表明,性能和效率有了实质性的提高。其中,串联开关的最坏情况插入损耗从−6.742 dB提高到−0.134 dB,驱动电压从58.345 V降低到37.933 V;对于并联开关,隔离度从−9.586 dB提高到−18.853 dB。与传统粒子群算法相比,算法的加速从3.2 ×提高到45 ×,证明了算法在鲁棒性和计算效率方面的优势。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Robust optimization algorithm of RF MEMS switches considering uncertainties
Efficient robust design of RF MEMS switches requires balancing stringent performance criteria with inherent uncertainties. This paper proposes a Comprehensive Robust MEMS Optimization (CRMO) framework that integrates a Surrogate-assisted Differential Evolution with Screening Constraints (SDESC) and a Surrogate-assisted Multi-Objective Worst-case (SMOW) analysis method using both global and local regression models with particle swarm optimization (PSO). The SDESC algorithm adaptively adjusts constraint evaluations based on the proportion of feasible solutions, significantly reducing computational overhead, while SMOW efficiently handles multi-objective worst-case scenarios. Experimental evaluations on a 35 GHz series switch and an 10 GHz shunt switch demonstrate substantial performance and efficiency improvements. Specifically, for the series switch, the worst-case insertion loss improved from −6.742 dB to −0.134 dB, and the driving voltage was reduced from 58.345 V to 37.933 V; for the shunt switch, isolation was enhanced from −9.586 dB to −18.853 dB. Furthermore, the proposed algorithm achieves speedup from 3.2 × to 45 × over traditional PSO methods, confirming its advantage in both robustness and computational efficiency.
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来源期刊
Integration-The Vlsi Journal
Integration-The Vlsi Journal 工程技术-工程:电子与电气
CiteScore
3.80
自引率
5.30%
发文量
107
审稿时长
6 months
期刊介绍: Integration''s aim is to cover every aspect of the VLSI area, with an emphasis on cross-fertilization between various fields of science, and the design, verification, test and applications of integrated circuits and systems, as well as closely related topics in process and device technologies. Individual issues will feature peer-reviewed tutorials and articles as well as reviews of recent publications. The intended coverage of the journal can be assessed by examining the following (non-exclusive) list of topics: Specification methods and languages; Analog/Digital Integrated Circuits and Systems; VLSI architectures; Algorithms, methods and tools for modeling, simulation, synthesis and verification of integrated circuits and systems of any complexity; Embedded systems; High-level synthesis for VLSI systems; Logic synthesis and finite automata; Testing, design-for-test and test generation algorithms; Physical design; Formal verification; Algorithms implemented in VLSI systems; Systems engineering; Heterogeneous systems.
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