Integration of freestanding hafnium zirconium oxide membranes into two-dimensional transistors as a high-κ ferroelectric dielectric

Two-dimensional semiconductors could be used as a channel material in miniaturized transistors with high gate control. However, the lack of insulators that are both compatible with two-dimensional materials and suitable for integration into a fully scalable process flow limits development. Here we show that freestanding hafnium zirconium oxide (Hf_0.5Zr_0.5O₂; HZO) membranes can be integrated with two-dimensional semiconductors as a high-κ dielectric. The HZO membranes can be varied in thickness from 5 to 40 nm, and be transferred onto molybdenum disulfide (MoS₂) to create the top-gate dielectric in field-effect transistors. A 20-nm-thick HZO membrane exhibits a dielectric constant of 20.6 ± 0.5 and a leakage current (at 1 MV cm⁻¹) of under 2.6 × 10⁻⁶ A cm⁻², below the requirements of the International Technology Roadmap for Semiconductors, as well as typical ferroelectric behaviour. The MoS₂ transistors with HZO dielectric exhibit an on/off ratio of 10⁹ and a subthreshold swing below 60 mV dec⁻¹ across four orders of current. We use the transistors to create an inverter, logic gates and a 1-bit full adder circuit. We also create a MoS₂ transistor with a channel length of 13 nm, which exhibits an on/off ratio of over 10⁸ and a subthreshold swing of 70 mV dec⁻¹.