{"title":"采用异质集成微热电冷却器的片上热点热延迟和峰值裁剪","authors":"Tingrui Gong , Chuangwei Ma , Linwei Cao , Wei Su","doi":"10.1016/j.applthermaleng.2025.127258","DOIUrl":null,"url":null,"abstract":"<div><div>Micro-thermoelectric coolers have emerged as a promising solution for on-chip dynamic thermal management due to their ability to provide localized, on-demand cooling. However, their practical implementation faces several challenges, including packaging integration, parasitic thermal resistance, and proper pulse current control. In this work, we characterize the performance of on-chip dynamic thermal management using a micro-thermoelectric cooler integrated into a thermal test vehicle within a flip-chip ball grid array package. We propose two dynamic thermal management strategies to investigate the time delay and peak clipping performance of hotspot temperature. Experimental results demonstrate that simultaneously activating the micro-TEC and the chip significantly enhances the performance of dynamic thermal management. Transient Peltier cooling immediately reduces the hotspot temperature by 10 °C below the ambient temperature under varying hotspot heat fluxes (150, 200, and 250 W/cm<sup>2</sup>). At a hotspot heat flux of 250 W/cm<sup>2</sup>, the micro-thermoelectric cooler consumes only 20 % of the chip power consumption while achieving an 8.24 s time delay and a 20.64 °C post-pulse temperature reduction using the time delay strategy. The peak clipping strategy consumes 80 % of the chip power consumption, resulting in a peak temperature reduction of 21.48 °C and a post-pulse temperature reduction of 20.79 °C.</div></div>","PeriodicalId":8201,"journal":{"name":"Applied Thermal Engineering","volume":"278 ","pages":"Article 127258"},"PeriodicalIF":6.9000,"publicationDate":"2025-06-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"On-chip hotspot thermal delay and peak clipping using a heterogeneously integrated micro-thermoelectric cooler\",\"authors\":\"Tingrui Gong , Chuangwei Ma , Linwei Cao , Wei Su\",\"doi\":\"10.1016/j.applthermaleng.2025.127258\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><div>Micro-thermoelectric coolers have emerged as a promising solution for on-chip dynamic thermal management due to their ability to provide localized, on-demand cooling. However, their practical implementation faces several challenges, including packaging integration, parasitic thermal resistance, and proper pulse current control. In this work, we characterize the performance of on-chip dynamic thermal management using a micro-thermoelectric cooler integrated into a thermal test vehicle within a flip-chip ball grid array package. We propose two dynamic thermal management strategies to investigate the time delay and peak clipping performance of hotspot temperature. Experimental results demonstrate that simultaneously activating the micro-TEC and the chip significantly enhances the performance of dynamic thermal management. Transient Peltier cooling immediately reduces the hotspot temperature by 10 °C below the ambient temperature under varying hotspot heat fluxes (150, 200, and 250 W/cm<sup>2</sup>). At a hotspot heat flux of 250 W/cm<sup>2</sup>, the micro-thermoelectric cooler consumes only 20 % of the chip power consumption while achieving an 8.24 s time delay and a 20.64 °C post-pulse temperature reduction using the time delay strategy. The peak clipping strategy consumes 80 % of the chip power consumption, resulting in a peak temperature reduction of 21.48 °C and a post-pulse temperature reduction of 20.79 °C.</div></div>\",\"PeriodicalId\":8201,\"journal\":{\"name\":\"Applied Thermal Engineering\",\"volume\":\"278 \",\"pages\":\"Article 127258\"},\"PeriodicalIF\":6.9000,\"publicationDate\":\"2025-06-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Applied Thermal Engineering\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1359431125018502\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENERGY & FUELS\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Applied Thermal Engineering","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1359431125018502","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENERGY & FUELS","Score":null,"Total":0}
On-chip hotspot thermal delay and peak clipping using a heterogeneously integrated micro-thermoelectric cooler
Micro-thermoelectric coolers have emerged as a promising solution for on-chip dynamic thermal management due to their ability to provide localized, on-demand cooling. However, their practical implementation faces several challenges, including packaging integration, parasitic thermal resistance, and proper pulse current control. In this work, we characterize the performance of on-chip dynamic thermal management using a micro-thermoelectric cooler integrated into a thermal test vehicle within a flip-chip ball grid array package. We propose two dynamic thermal management strategies to investigate the time delay and peak clipping performance of hotspot temperature. Experimental results demonstrate that simultaneously activating the micro-TEC and the chip significantly enhances the performance of dynamic thermal management. Transient Peltier cooling immediately reduces the hotspot temperature by 10 °C below the ambient temperature under varying hotspot heat fluxes (150, 200, and 250 W/cm2). At a hotspot heat flux of 250 W/cm2, the micro-thermoelectric cooler consumes only 20 % of the chip power consumption while achieving an 8.24 s time delay and a 20.64 °C post-pulse temperature reduction using the time delay strategy. The peak clipping strategy consumes 80 % of the chip power consumption, resulting in a peak temperature reduction of 21.48 °C and a post-pulse temperature reduction of 20.79 °C.
期刊介绍:
Applied Thermal Engineering disseminates novel research related to the design, development and demonstration of components, devices, equipment, technologies and systems involving thermal processes for the production, storage, utilization and conservation of energy, with a focus on engineering application.
The journal publishes high-quality and high-impact Original Research Articles, Review Articles, Short Communications and Letters to the Editor on cutting-edge innovations in research, and recent advances or issues of interest to the thermal engineering community.