SR-BIP：一种软容错二值神经网络推理处理器

IF 2.9 3区计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems Pub Date : 2024-12-27 DOI:10.1109/TCAD.2024.3523424

Gil-Ho Kwak;Jaeho Kim;Tae-Hwan Kim

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引用次数: 0

摘要

本文介绍了一种高效的二值神经网络推理处理器，即对潜在电路故障引起的软错误具有弹性。所提出的处理器SR-BIP基于一种基于重新计算的纠错技术实现了错误恢复。通过利用特征映射中固有的空间局部性来选择性地执行重新计算，以最小化开销。对于误码率为0.1%的CIFAR10任务，SR-BIP的准确率达到84.42%，比不加差错恢复的准确率提高了17.59%。尽管具有这种错误弹性，SR-BIP在28nm FPGA上的资源效率为75.27 MOP/s/LUT，与之前不考虑错误弹性的最先进处理器一样高。

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SR-BIP: A Soft Error-Resilient Binary Neural Network Inference Processor

This brief presents an efficient binary neural network inference processor, that is, resilient to soft errors caused by potential circuit faults. The proposed processor, SR-BIP, achieves error resilience based on a recompute-based error correction technique. The recompute is selectively performed by exploiting spatial locality inherent in a feature map, to minimize overhead. For the CIFAR10 task at 0.1% bit error rate, SR-BIP achieves 84.42% accuracy, which is 17.59% higher than that without any error resilience. Despite this error resilience, SR-BIP exhibits a resource efficiency of 75.27 MOP/s/LUT in a 28-nm FPGA, which is as high as that of the previous state-of-the-art processor designed without considering error resilience.

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来源期刊

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 工程技术-工程：电子与电气

CiteScore

5.60

自引率

13.80%

发文量

500

审稿时长

7 months

期刊介绍： The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.