网络布局:基于网络布局的拥塞预测嫁接网表知识

IF 2.9 3区 计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Lancheng Zou;Su Zheng;Peng Xu;Siting Liu;Bei Yu;Martin D. F. Wong
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引用次数: 0

摘要

拥塞建模对于增强VLSI放置解决方案的可达性至关重要。网络列表信息的未充分利用限制了现有基于布局的拥塞建模技术的有效性。我们设计了一种新的方法,将基于网络列表的消息传递(MP)移植到基于布局的模型中,从而实现布局和网络列表之间更好的知识融合,从而提高拥塞预测的性能。创新的异构MP模式通过考虑单元之间的连接、网络的重叠以及单元和网络之间的相互作用,更有效地将路由需求纳入模型。利用多尺度特征,提出的模型有效地捕获了不同范围的连接信息,解决了现有模型中存在的全局信息不足的问题。使用对比学习和mini-Gnet技术可以使模型更有效地学习和表示特征,从而提高其能力并实现卓越的性能。大量的实验表明,与现有方法相比,该模型的性能有显著提高。我们的代码可在:https://github.com/lanchengzou/congPred。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Lay-Net: Grafting Netlist Knowledge on Layout-Based Congestion Prediction
Congestion modeling is crucial for enhancing the routability of VLSI placement solutions. The underutilization of netlist information constrains the efficacy of existing layout-based congestion modeling techniques. We devise a novel approach that grafts netlist-based message passing (MP) into a layout-based model, thereby achieving a better knowledge fusion between layout and netlist to improve congestion prediction performance. The innovative heterogeneous MP paradigm more effectively incorporates routing demand into the model by considering connections between cells, overlaps of nets, and interactions between cells and nets. Leveraging multiscale features, the proposed model effectively captures connection information across various ranges, addressing the issue of inadequate global information present in existing models. Using contrastive learning and mini-Gnet techniques allows the model to learn and represent features more effectively, boosting its capabilities and achieving superior performance. Extensive experiments demonstrate a notable performance enhancement of the proposed model compared to existing methods. Our code is available at: https://github.com/lanchengzou/congPred.
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来源期刊
CiteScore
5.60
自引率
13.80%
发文量
500
审稿时长
7 months
期刊介绍: The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components. The aids include methods, models, algorithms, and man-machine interfaces for system-level, physical and logical design including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, hardware-software co-design and documentation of integrated circuit and system designs of all complexities. Design tools and techniques for evaluating and designing integrated circuits and systems for metrics such as performance, power, reliability, testability, and security are a focus.
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