ToPro+: a topology projector considering port assignment and waveguide routing for wavelength-routed optical networks-on-chip

For supporting high-bandwidth communication with low power and latency, wavelength-routed optical networks-on-chip (WRONoCs) are widely considered an appealing option for high-performance computing systems. Moreover, current physical-design-friendly topologies, where the interconnect is optimized to match physical constraints, have attracted increasing attention. Despite the layout-aware interconnect, current physical design methods overlook the physical information and synthesize layouts from scratch. As a result, the implementation of the physical-design-friendly topologies faces two major concerns: (a) significant computational complexity caused by performing physical design from scratch and (b) high power consumption due to much insertion loss generated by extra crossings or detours of waveguides in the layout results. To overcome them, we propose a novel, to our knowledge, design methodology, ToPro+, to implement physical-design-friendly topologies. Instead of abandoning the layout-aware interconnect of those topologies, we make full use of them by projecting the topologies directly onto a layout plane. In this way, the interconnect is entirely reserved and directly serves as a set of physical connections, which reduces the computational complexity. To avoid extra crossings and detours of waveguides, we optimize the assignment from the input/output ports of a topology to the sending/receiving terminals of nodes and the waveguide routing between them. The experimental results demonstrate the efficiency of ToPro+. For a 16-node network, compared to the two latest WRONoC design methods, ToPro+ synthesizes it within a few seconds and reduces the total optical power consumption by about 30%.