低压高精度开关电容δ - σ调制器的分析与设计

IF 3.2
Weiqiang Chen;Lingxin Meng;Menglian Zhao;Zhichao Tan
{"title":"低压高精度开关电容δ - σ调制器的分析与设计","authors":"Weiqiang Chen;Lingxin Meng;Menglian Zhao;Zhichao Tan","doi":"10.1109/OJSSCS.2024.3517600","DOIUrl":null,"url":null,"abstract":"Low-voltage delta–sigma modulators (DSMs) have broad application prospects in power-constrained sensor systems but with undeveloped energy efficiency. This article includes the current development of low-voltage DSMs and the design challenges of low-voltage discrete-time (DT) DSMs. As a case study, a DT zoom DSM with a low-voltage capacitively biased floating inverter amplifier is presented with detailed design considerations. Fabricated in 55-nm CMOS under a 0.5-V supply, the prototype achieves 83.6-dB signal-to-noise-and-distortion ratio (SNDR) and 86.0-dB dynamic range while only consuming 664 nW at a signal bandwidth of 1 kHz. This achieves a state-of-the-art SNDR-based figure of merit of 175.4 dB among low-voltage switched-capacitor DSMs.","PeriodicalId":100633,"journal":{"name":"IEEE Open Journal of the Solid-State Circuits Society","volume":"5 ","pages":"157-166"},"PeriodicalIF":3.2000,"publicationDate":"2024-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10803003","citationCount":"0","resultStr":"{\"title\":\"Analysis and Design of a Low-Voltage High-Precision Switched-Capacitor Delta–Sigma Modulator\",\"authors\":\"Weiqiang Chen;Lingxin Meng;Menglian Zhao;Zhichao Tan\",\"doi\":\"10.1109/OJSSCS.2024.3517600\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Low-voltage delta–sigma modulators (DSMs) have broad application prospects in power-constrained sensor systems but with undeveloped energy efficiency. This article includes the current development of low-voltage DSMs and the design challenges of low-voltage discrete-time (DT) DSMs. As a case study, a DT zoom DSM with a low-voltage capacitively biased floating inverter amplifier is presented with detailed design considerations. Fabricated in 55-nm CMOS under a 0.5-V supply, the prototype achieves 83.6-dB signal-to-noise-and-distortion ratio (SNDR) and 86.0-dB dynamic range while only consuming 664 nW at a signal bandwidth of 1 kHz. This achieves a state-of-the-art SNDR-based figure of merit of 175.4 dB among low-voltage switched-capacitor DSMs.\",\"PeriodicalId\":100633,\"journal\":{\"name\":\"IEEE Open Journal of the Solid-State Circuits Society\",\"volume\":\"5 \",\"pages\":\"157-166\"},\"PeriodicalIF\":3.2000,\"publicationDate\":\"2024-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10803003\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Open Journal of the Solid-State Circuits Society\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10803003/\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Open Journal of the Solid-State Circuits Society","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10803003/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

低压δ - σ调制器在功率受限的传感器系统中有着广阔的应用前景,但其能效水平还有待提高。本文介绍了低压离散时间(DT) dsm的发展现状和设计挑战。作为一个案例研究,提出了一种带有低压电容偏置浮动逆变器放大器的DT变焦DSM,并给出了详细的设计考虑。该原型机采用55纳米CMOS工艺,在0.5 v电源下实现了83.6 db的信噪比(SNDR)和86.0 db的动态范围,而在1 kHz的信号带宽下仅消耗664 nW。这在低压开关电容dsm中实现了最先进的基于sndr的175.4 dB的优值。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analysis and Design of a Low-Voltage High-Precision Switched-Capacitor Delta–Sigma Modulator
Low-voltage delta–sigma modulators (DSMs) have broad application prospects in power-constrained sensor systems but with undeveloped energy efficiency. This article includes the current development of low-voltage DSMs and the design challenges of low-voltage discrete-time (DT) DSMs. As a case study, a DT zoom DSM with a low-voltage capacitively biased floating inverter amplifier is presented with detailed design considerations. Fabricated in 55-nm CMOS under a 0.5-V supply, the prototype achieves 83.6-dB signal-to-noise-and-distortion ratio (SNDR) and 86.0-dB dynamic range while only consuming 664 nW at a signal bandwidth of 1 kHz. This achieves a state-of-the-art SNDR-based figure of merit of 175.4 dB among low-voltage switched-capacitor DSMs.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信