A 66–160 GHz Broadband Frequency Multiplier Chain (×6) With High Harmonic Suppression

This letter presents a 66–160 GHz $\times 6$ frequency multiplier chain (FMC) in 0.1- $\mu $ m pHEMT technology with good harmonic suppression performance. The FMC chip integrates four cascaded stages, including a driver amplifier (DA) with a semi-lumped low-pass filter (SLLPF), a double-balanced tripler with a semi-lumped high-pass filter (SLHPF), a balanced DA, and a double-balanced doubler which are designed rigorously for specific harmonic suppression. Balanced configurations join with semi-lumped filters and wideband passive multipliers to achieve broad bandwidth (BW), power flatness, and excellent harmonic suppression. The measured 3-dB BW of the FMC is 66–160 GHz (relative BW of 83.2%), and the measured peak output power is 7 dBm. The harmonic suppression reaches over 25 dBc within 87–160 GHz (relative BW of 59.1%). To the best of our knowledge, the proposed FMC exhibits the widest relative BW, high harmonic suppression, and comparable output power.